From: Andrea Parri <parri.andrea@gmail.com>
To: Puranjay Mohan <puranjay@kernel.org>
Cc: Daniel Lustig <dlustig@nvidia.com>, Will Deacon <will@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Boqun Feng <boqun.feng@gmail.com>,
Mark Rutland <mark.rutland@arm.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH] riscv/atomic.h: optimize ops with acquire/release ordering
Date: Wed, 8 May 2024 17:04:40 +0200 [thread overview]
Message-ID: <ZjuUiHp4Qc7EzuOz@andrea> (raw)
In-Reply-To: <mb61pttj8z9p9.fsf@kernel.org>
> From my understanding of the current version of the RV memory model:
>
> .aq provides .aq -> all ordering
> .rl provides all -> .rl ordering
> and because this is RCsc variant of release consistency
> .rl -> .aq
>
> which means
>
> R/W
> amoswap.w.rl
> amoswap.w.aq
> R/W
>
> Should act as a full fence? R/W -> rl -> aq -> R/W
Yes, hence the RCsc ("sc" for "sequential consistent") qualification.
> So, I will do the following now:
>
> 1. Do some benchmarking on real hardware and find out how much overhead
> these weak fences add.
> 2. Study the LKMM and the RVWMO for the next few weeks/months or however
> much time it takes me to confidently reason about things written in
> these two models.
> 3. Study the locking / related code of RISC-V to see what could break if
> we change all these operations in accordance with "Code Porting and
> Mapping Guidelines" of RISCV ISA.
> 4. I will use the herd7 models of LKMM and RVWMO and see if everything
> works as expected after these changes.
>
>
> And If I am convinced after all this, I will send a patch to implement
> "Code Porting and Mapping Guidelines" + provide performance numbers from
> real hardware.
>
> Thanks for the detailed explainations and especially regarding how the
> LKMM evolved.
Sounds good! Thanks.
Andrea
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prev parent reply other threads:[~2024-05-08 15:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-05 12:33 [PATCH] riscv/atomic.h: optimize ops with acquire/release ordering Puranjay Mohan
2024-05-05 22:45 ` Andrea Parri
2024-05-07 14:07 ` Puranjay Mohan
2024-05-07 22:27 ` Andrea Parri
2024-05-08 13:58 ` Puranjay Mohan
2024-05-08 15:04 ` Andrea Parri [this message]
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