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From: Drew Fustini <dfustini@tenstorrent.com>
To: Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
	 Fu Wei <wefu@redhat.com>, Yangtao Li <frank.li@vivo.com>,
	 Thomas Bonnefille <thomas.bonnefille@bootlin.com>,
	 Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Drew Fustini <dfustini@tenstorrent.com>,
	 Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH RFC v3 1/7] riscv: dts: thead: Fix node ordering in TH1520 device tree
Date: Mon, 06 May 2024 21:55:14 -0700	[thread overview]
Message-ID: <20240506-th1520-clk-v3-1-085a18a23a7f@tenstorrent.com> (raw)
In-Reply-To: <20240506-th1520-clk-v3-0-085a18a23a7f@tenstorrent.com>

From: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

According to the device tree coding style, nodes shall be ordered by
unit address in ascending order.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 54 +++++++++++++++++------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 8b915e206f3a..d2fa25839012 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -193,6 +193,33 @@ uart0: serial@ffe7014000 {
 			status = "disabled";
 		};
 
+		emmc: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio0: mmc@ffe7090000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio1: mmc@ffe70a0000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe70a0000 0x0 0x10000>;
+			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		uart1: serial@ffe7f00000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xe7f00000 0x0 0x100>;
@@ -311,33 +338,6 @@ dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
-		emmc: mmc@ffe7080000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7080000 0x0 0x10000>;
-			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio0: mmc@ffe7090000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7090000 0x0 0x10000>;
-			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio1: mmc@ffe70a0000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe70a0000 0x0 0x10000>;
-			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;

-- 
2.34.1


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  reply	other threads:[~2024-05-07  4:57 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-07  4:55 [PATCH RFC v3 0/7] clk: thead: Add support for TH1520 AP_SUBSYS clock controller Drew Fustini
2024-05-07  4:55 ` Drew Fustini [this message]
2024-05-07  4:55 ` [PATCH RFC v3 2/7] dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller Drew Fustini
2024-05-07 20:16   ` Rob Herring (Arm)
2024-05-09 22:13   ` Stephen Boyd
2024-05-07  4:55 ` [PATCH RFC v3 3/7] clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks Drew Fustini
2024-05-07  4:55 ` [PATCH RFC v3 4/7] riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller Drew Fustini
2024-05-07  4:55 ` [PATCH RFC v3 5/7] riscv: dts: thead: change TH1520 uart nodes to use " Drew Fustini
2024-05-07  4:55 ` [PATCH RFC v3 6/7] riscv: dts: thead: change TH1520 mmc " Drew Fustini
2024-05-07  4:55 ` [PATCH RFC v3 7/7] riscv: dts: thead: update TH1520 dma and timer " Drew Fustini

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