Linux-RISC-V Archive mirror
 help / color / mirror / Atom feed
From: Conor Dooley <conor@kernel.org>
To: soc@kernel.org
Cc: conor@kernel.org, linux-riscv@lists.infradead.org
Subject: [GIT PULL] RISC-V Devicetrees for v6.10
Date: Fri, 3 May 2024 16:24:24 +0100	[thread overview]
Message-ID: <20240503-swimmer-botany-7368a8a17b1a@spud> (raw)


[-- Attachment #1.1: Type: text/plain, Size: 6308 bytes --]

Hey Arnd,

Please pull some dt updates for v6.10. The diff here is a little bigger
than my tag implies, but I've done this on top of -fixes and wanted to
make this obvious. I've also not really mentioned all the Kconfig stuff
much as you'll get that in another branch.

Cheers,
Conor.

The following changes since commit 4cece764965020c22cff7665b18a012006359095:

  Linux 6.9-rc1 (2024-03-24 14:10:05 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-dt-for-v6.10

for you to fetch changes up to 8fd63d81a76024fbd8e3fca29a0748bc9ca46161:

  riscv: dts: microchip: add pac1934 power-monitor to icicle (2024-05-02 17:24:09 +0100)

----------------------------------------------------------------
RISC-V Devicetrees for v6.10

Canaan:
Basic support for the k230 from Canaan and two boards based on it.
The k230 is the first SoC we're adding support for that implements the
ratified Vector extension, granted mainline doesn't yet support the
non-ratified extension for the SoCs that have it. Only the "Big" core is
supported right now and in a very basic configuration. The SoC is also
the first we have that support the Zicbom and Zicboz cache
management/zeroing extensions. Despite having T-Head CPU cores, the
non-spec compliant page table bit "erratum" isn't currently used here
either, as the SoC supports the standard Svpbmt extension. Using Svpbmt
requires non-factory m-mode firmware to clear the relevant bit in
CSR.MXSTATUS, but non-factory firmware is required for running mainline
on most (all?) SoCs using a T-Head CPU to date due to other issues.
Commit 5db2c4dc413e ("riscv: dts: add initial canmv-k230 and k230-evb
dts") contains more information on the supported extensions.

Support for the k230 required some re-jiggling of Kconfig options that
previously operated under the assumption that a Canaan SoC meant a
kernel running in m-mode with the MMU disabled.

Microchip:
A simple addition of a power-monitor on the Icicle dev board, as the
binding for it is now in mainline.

StarFive:
Support for the Milk-V Mars. This board is incredibly similar to the
VisionFive v2 that is already supported, with only the really ethernet
configuration being slightly different. Emil requested that a common
dtsi file, so my fixes branch is pulled into for-next to avoid an
annoying conflict between moved content and some erroneously added
nodes that were removed as fixes this cycle.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Conor Dooley (3):
      RISC-V: Drop unused SOC_CANAAN
      RISC-V: add Milkv Mars board devicetree
      riscv: dts: microchip: add pac1934 power-monitor to icicle

Hannah Peuckmann (2):
      riscv: dts: starfive: visionfive 2: Remove non-existing TDM hardware
      riscv: dts: starfive: visionfive 2: Remove non-existing I2S hardware

Jisheng Zhang (8):
      riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi
      dt-bindings: riscv: starfive: add Milkv Mars board
      riscv: dts: starfive: visionfive 2: update sound and codec dt node name
      riscv: dts: starfive: visionfive 2: use cpus label for timebase freq
      riscv: dts: starfive: visionfive 2: add tf cd-gpios
      riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcard
      riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards
      riscv: dts: starfive: add Milkv Mars board device tree

Shengyu Qu (1):
      riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board

Thomas Bonnefille (1):
      riscv: dts: thead: Fix node ordering in TH1520 device tree

Yangyu Chen (10):
      riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210
      soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210
      clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210
      pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210
      reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210
      dt-bindings: riscv: Add T-HEAD C908 compatible
      dt-bindings: add Canaan K230 boards compatible strings
      dt-bindings: timer: Add Canaan K230 CLINT
      dt-bindings: interrupt-controller: Add Canaan K230 PLIC
      riscv: dts: add initial canmv-k230 and k230-evb dts

 .../interrupt-controller/sifive,plic-1.0.0.yaml    |   1 +
 .../devicetree/bindings/riscv/canaan.yaml          |   8 +-
 Documentation/devicetree/bindings/riscv/cpus.yaml  |   1 +
 .../devicetree/bindings/riscv/starfive.yaml        |   1 +
 .../devicetree/bindings/timer/sifive,clint.yaml    |   1 +
 arch/riscv/Kconfig.socs                            |   8 +-
 arch/riscv/Makefile                                |   2 +-
 arch/riscv/boot/dts/canaan/Makefile                |   2 +
 arch/riscv/boot/dts/canaan/k230-canmv.dts          |  24 +
 arch/riscv/boot/dts/canaan/k230-evb.dts            |  24 +
 arch/riscv/boot/dts/canaan/k230.dtsi               | 142 +++++
 arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts  |  32 +
 arch/riscv/boot/dts/starfive/Makefile              |   1 +
 arch/riscv/boot/dts/starfive/jh7100.dtsi           |   2 +-
 arch/riscv/boot/dts/starfive/jh7110-common.dtsi    | 599 ++++++++++++++++++
 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts |  30 +
 .../dts/starfive/jh7110-starfive-visionfive-2.dtsi | 683 +--------------------
 arch/riscv/boot/dts/starfive/jh7110.dtsi           |   2 +-
 arch/riscv/boot/dts/thead/th1520.dtsi              |  54 +-
 arch/riscv/configs/nommu_k210_defconfig            |   3 +-
 arch/riscv/configs/nommu_k210_sdcard_defconfig     |   3 +-
 drivers/clk/Kconfig                                |   4 +-
 drivers/pinctrl/Kconfig                            |   4 +-
 drivers/reset/Kconfig                              |   4 +-
 drivers/soc/Makefile                               |   2 +-
 drivers/soc/canaan/Kconfig                         |   4 +-
 26 files changed, 914 insertions(+), 727 deletions(-)
 create mode 100644 arch/riscv/boot/dts/canaan/k230-canmv.dts
 create mode 100644 arch/riscv/boot/dts/canaan/k230-evb.dts
 create mode 100644 arch/riscv/boot/dts/canaan/k230.dtsi
 create mode 100644 arch/riscv/boot/dts/starfive/jh7110-common.dtsi
 create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

             reply	other threads:[~2024-05-03 15:24 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-03 15:24 Conor Dooley [this message]
2024-05-07  9:27 ` [GIT PULL] RISC-V Devicetrees for v6.10 Arnd Bergmann
2024-05-07  9:58   ` Conor Dooley
2024-05-07 10:08     ` Arnd Bergmann
2024-05-07 10:21       ` Conor Dooley
2024-05-07 12:15         ` Arnd Bergmann
2024-05-08 20:19           ` Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240503-swimmer-botany-7368a8a17b1a@spud \
    --to=conor@kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=soc@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).