From: "Paul E. McKenney" <paulmck@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: kernel-team@meta.com, "Paul E. McKenney" <paulmck@kernel.org>,
Andi Shyti <andi.shyti@linux.intel.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
linux-riscv@lists.infradead.org
Subject: [PATCH RFC cmpxchg 8/8] riscv: Emulate one-byte and two-byte cmpxchg
Date: Mon, 1 Apr 2024 14:39:50 -0700 [thread overview]
Message-ID: <20240401213950.3910531-8-paulmck@kernel.org> (raw)
In-Reply-To: <31c82dcc-e203-48a9-aadd-f2fcd57d94c1@paulmck-laptop>
Use the new cmpxchg_emu_u8() and cmpxchg_emu_u16() to emulate one-byte
and two-byte cmpxchg() on riscv.
[ paulmck: Apply kernel test robot feedback. ]
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: <linux-riscv@lists.infradead.org>
---
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/cmpxchg.h | 25 +++++++++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index be09c8836d56b..4eaf40d0a52ec 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -44,6 +44,7 @@ config RISCV
select ARCH_HAS_UBSAN
select ARCH_HAS_VDSO_DATA
select ARCH_KEEP_MEMBLOCK if ACPI
+ select ARCH_NEED_CMPXCHG_1_2_EMU
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
select ARCH_STACKWALK
diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 2fee65cc84432..a5b377481785c 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -9,6 +9,7 @@
#include <linux/bug.h>
#include <asm/fence.h>
+#include <linux/cmpxchg-emu.h>
#define __xchg_relaxed(ptr, new, size) \
({ \
@@ -170,6 +171,12 @@
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
switch (size) { \
+ case 1: \
+ __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
+ break; \
+ case 2: \
+ break; \
+ __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
case 4: \
__asm__ __volatile__ ( \
"0: lr.w %0, %2\n" \
@@ -214,6 +221,12 @@
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
switch (size) { \
+ case 1: \
+ __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
+ break; \
+ case 2: \
+ break; \
+ __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
case 4: \
__asm__ __volatile__ ( \
"0: lr.w %0, %2\n" \
@@ -260,6 +273,12 @@
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
switch (size) { \
+ case 1: \
+ __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
+ break; \
+ case 2: \
+ break; \
+ __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
case 4: \
__asm__ __volatile__ ( \
RISCV_RELEASE_BARRIER \
@@ -306,6 +325,12 @@
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
switch (size) { \
+ case 1: \
+ __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
+ break; \
+ case 2: \
+ break; \
+ __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
case 4: \
__asm__ __volatile__ ( \
"0: lr.w %0, %2\n" \
--
2.40.1
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next parent reply other threads:[~2024-04-01 21:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <31c82dcc-e203-48a9-aadd-f2fcd57d94c1@paulmck-laptop>
2024-04-01 21:39 ` Paul E. McKenney [this message]
2024-04-04 14:15 ` [PATCH RFC cmpxchg 8/8] riscv: Emulate one-byte and two-byte cmpxchg Palmer Dabbelt
2024-04-04 14:50 ` Paul E. McKenney
2024-05-11 6:50 ` Guo Ren
2024-05-11 14:54 ` Paul E. McKenney
2024-05-11 20:44 ` Leonardo Bras
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