From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH 1/3] dt-bindings: clock: keystone: remove unstable remark
Date: Sat, 24 Feb 2024 10:12:34 +0100 [thread overview]
Message-ID: <20240224091236.10146-1-krzysztof.kozlowski@linaro.org> (raw)
Keystone clock controller bindings were marked as work-in-progress /
unstable in 2013 in commit b9e0d40c0d83 ("clk: keystone: add Keystone
PLL clock driver") and commit 7affe5685c96 ("clk: keystone: Add gate
control clock driver") Almost eleven years is enough, so drop the
"unstable" remark and expect usual ABI rules.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/clock/keystone-gate.txt | 2 --
Documentation/devicetree/bindings/clock/keystone-pll.txt | 2 --
2 files changed, 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/keystone-gate.txt b/Documentation/devicetree/bindings/clock/keystone-gate.txt
index c5aa187026e3..43f6fb6c9392 100644
--- a/Documentation/devicetree/bindings/clock/keystone-gate.txt
+++ b/Documentation/devicetree/bindings/clock/keystone-gate.txt
@@ -1,5 +1,3 @@
-Status: Unstable - ABI compatibility may be broken in the future
-
Binding for Keystone gate control driver which uses PSC controller IP.
This binding uses the common clock binding[1].
diff --git a/Documentation/devicetree/bindings/clock/keystone-pll.txt b/Documentation/devicetree/bindings/clock/keystone-pll.txt
index 9a3fbc665606..69b0eb7c03c9 100644
--- a/Documentation/devicetree/bindings/clock/keystone-pll.txt
+++ b/Documentation/devicetree/bindings/clock/keystone-pll.txt
@@ -1,5 +1,3 @@
-Status: Unstable - ABI compatibility may be broken in the future
-
Binding for keystone PLLs. The main PLL IP typically has a multiplier,
a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
and PAPLL are controlled by the memory mapped register where as the Main
--
2.34.1
next reply other threads:[~2024-02-24 9:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-24 9:12 Krzysztof Kozlowski [this message]
2024-02-24 9:12 ` [PATCH 2/3] dt-bindings: clock: ti: remove unstable remark Krzysztof Kozlowski
2024-02-26 19:45 ` Rob Herring
2024-02-28 22:59 ` Stephen Boyd
2024-02-29 5:48 ` Tony Lindgren
2024-02-24 9:12 ` [PATCH 3/3] dt-bindings: remoteproc: ti,davinci: " Krzysztof Kozlowski
2024-02-26 16:12 ` Mathieu Poirier
2024-02-26 19:45 ` Rob Herring
2024-02-26 19:44 ` [PATCH 1/3] dt-bindings: clock: keystone: " Rob Herring
2024-02-28 23:00 ` Stephen Boyd
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