From: Swapnil Jakhade <sjakhade@cadence.com>
To: <vkoul@kernel.org>, <kishon@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: <mparab@cadence.com>, <sjakhade@cadence.com>, <rogerq@kernel.org>,
<s-vadapalli@ti.com>
Subject: [PATCH v4 0/5] PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver
Date: Thu, 4 Jan 2024 14:30:08 +0100 [thread overview]
Message-ID: <20240104133013.2911035-1-sjakhade@cadence.com> (raw)
This patch series extends Torrent PHY driver functionality to support
dual input reference clocks.
It also adds support for following multilink configurations:
- PCIe(100MHz) + USXGMII(156.25MHz)
- USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
The changes have been validated on TI J721E and J7200 platforms.
v1 of the patch series can be found at [1].
Version History:
v4:
- Fixed error handling in patch 2/5 as per review comments for v3
- Added Acked-by and Reviewed-by tags
v3:
- Updated clock description in DT documentation
- Added Acked-by from Conor
v2:
- Rename refclk1 to pll1_refclk in bindings and in driver
- Simplify clock-names as suggested by Rob
[1] https://lore.kernel.org/linux-phy/20230724150002.5645-1-sjakhade@cadence.com/
Swapnil Jakhade (5):
dt-bindings: phy: cadence-torrent: Add optional input reference clock
for PLL1
phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink
configuration
phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
multilink configuration
dt-bindings: phy: cadence-torrent: Add a separate compatible for TI
J7200
phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
multilink config for TI J7200
.../bindings/phy/phy-cadence-torrent.yaml | 11 +-
drivers/phy/cadence/phy-cadence-torrent.c | 720 +++++++++++++++++-
2 files changed, 719 insertions(+), 12 deletions(-)
--
2.25.1
--
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next reply other threads:[~2024-01-04 13:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-04 13:30 Swapnil Jakhade [this message]
2024-01-04 13:30 ` [PATCH v4 1/5] dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1 Swapnil Jakhade
2024-01-04 13:30 ` [PATCH v4 2/5] phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration Swapnil Jakhade
2024-02-02 11:37 ` Roger Quadros
2024-01-04 13:30 ` [PATCH v4 3/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) " Swapnil Jakhade
2024-01-04 13:30 ` [PATCH v4 4/5] dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 Swapnil Jakhade
2024-01-04 13:30 ` [PATCH v4 5/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config " Swapnil Jakhade
2024-02-02 7:14 ` [PATCH v4 0/5] PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver Swapnil Kashinath Jakhade
2024-02-07 14:01 ` Vinod Koul
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