Linux-perf-users Archive mirror
 help / color / mirror / Atom feed
From: James Clark <james.clark@arm.com>
To: linux-perf-users@vger.kernel.org,
	gankulkarni@os.amperecomputing.com,
	scclevenger@os.amperecomputing.com, coresight@lists.linaro.org,
	suzuki.poulose@arm.com, mike.leach@linaro.org
Cc: James Clark <james.clark@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	John Garry <john.g.garry@oracle.com>,
	Will Deacon <will@kernel.org>, Leo Yan <leo.yan@linux.dev>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions
Date: Mon, 29 Apr 2024 16:21:45 +0100	[thread overview]
Message-ID: <20240429152207.479221-1-james.clark@arm.com> (raw)

This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
as long as there are fewer than that many ETMs connected to each sink.

Each sink owns its own trace ID map, and any Perf session connecting to
that sink will allocate from it, even if the sink is currently in use by
other users. This is similar to the existing behavior where the dynamic
trace IDs are constant as long as there is any concurrent Perf session
active. It's not completely optimal because slightly more IDs will be
used than necessary, but the optimal solution involves tracking the PIDs
of each session and allocating ID maps based on the session owner. This
is difficult to do with the combination of per-thread and per-cpu modes
and some scheduling issues. The complexity of this isn't likely to worth
it because even with multiple users they'd just see a difference in the
ordering of ID allocations rather than hitting any limits (unless the
hardware does have too many ETMs connected to one sink).

Per-thread mode works but only until there are any overlapping IDs, at
which point Perf will error out. Both per-thread mode and sysfs mode are
left to future changes, but both can be added on top of this initial
implementation and only sysfs mode requires further driver changes.

The HW_ID version field hasn't been bumped in order to not break Perf
which already has an error condition for other values of that field.
Instead a new minor version has been added which signifies that there
are new fields but the old fields are backwards compatible.


James Clark (17):
  perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions
  perf auxtrace: Allow number of queues to be specified
  perf: cs-etm: Create decoders after both AUX and HW_ID search passes
  perf: cs-etm: Allocate queues for all CPUs
  perf: cs-etm: Move traceid_list to each queue
  perf: cs-etm: Create decoders based on the trace ID mappings
  perf: cs-etm: Support version 0.1 of HW_ID packets
  coresight: Remove unused stubs
  coresight: Clarify comments around the PID of the sink owner
  coresight: Move struct coresight_trace_id_map to common header
  coresight: Expose map argument in trace ID API
  coresight: Make CPU id map a property of a trace ID map
  coresight: Pass trace ID map into source enable
  coresight: Use per-sink trace ID maps for Perf sessions
  coresight: Remove pending trace ID release mechanism
  coresight: Re-emit trace IDs when the sink changes in per-thread mode
  coresight: Emit HW_IDs for all ETMs that are using the sink

 drivers/hwtracing/coresight/coresight-core.c  |  10 +
 drivers/hwtracing/coresight/coresight-dummy.c |   3 +-
 .../hwtracing/coresight/coresight-etm-perf.c  |  82 ++-
 .../hwtracing/coresight/coresight-etm-perf.h  |  20 +-
 .../coresight/coresight-etm3x-core.c          |  14 +-
 .../coresight/coresight-etm4x-core.c          |  14 +-
 drivers/hwtracing/coresight/coresight-stm.c   |   3 +-
 drivers/hwtracing/coresight/coresight-sysfs.c |   3 +-
 .../hwtracing/coresight/coresight-tmc-etr.c   |   5 +-
 drivers/hwtracing/coresight/coresight-tmc.h   |   5 +-
 drivers/hwtracing/coresight/coresight-tpdm.c  |   3 +-
 .../hwtracing/coresight/coresight-trace-id.c  | 107 +--
 .../hwtracing/coresight/coresight-trace-id.h  |  57 +-
 include/linux/coresight-pmu.h                 |  17 +-
 include/linux/coresight.h                     |  20 +-
 tools/include/linux/coresight-pmu.h           |  17 +-
 tools/perf/util/auxtrace.c                    |   9 +-
 tools/perf/util/auxtrace.h                    |   1 +
 .../perf/util/cs-etm-decoder/cs-etm-decoder.c |  28 +-
 tools/perf/util/cs-etm.c                      | 617 ++++++++++++------
 tools/perf/util/cs-etm.h                      |   2 +-
 21 files changed, 633 insertions(+), 404 deletions(-)

-- 
2.34.1


             reply	other threads:[~2024-04-29 15:23 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-29 15:21 James Clark [this message]
2024-04-29 15:21 ` [PATCH 01/17] perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions James Clark
2024-05-07  3:47   ` Anshuman Khandual
2024-05-07 10:06     ` James Clark
2024-05-07 10:57       ` Anshuman Khandual
2024-05-07 14:54         ` Arnaldo Carvalho de Melo
2024-04-29 15:21 ` [PATCH 02/17] perf auxtrace: Allow number of queues to be specified James Clark
2024-04-30  6:36   ` Adrian Hunter
2024-05-07  4:26   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 03/17] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-04-29 15:21 ` [PATCH 04/17] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-04-29 15:21 ` [PATCH 05/17] perf: cs-etm: Move traceid_list to each queue James Clark
2024-04-29 15:21 ` [PATCH 06/17] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-04-29 15:21 ` [PATCH 07/17] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-04-29 15:21 ` [PATCH 08/17] coresight: Remove unused stubs James Clark
2024-05-01 11:06   ` Mike Leach
2024-05-07  4:15   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 09/17] coresight: Clarify comments around the PID of the sink owner James Clark
2024-05-01 11:07   ` Mike Leach
2024-05-07  4:25   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 10/17] coresight: Move struct coresight_trace_id_map to common header James Clark
2024-05-01 11:11   ` Mike Leach
2024-05-07  5:50   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map argument in trace ID API James Clark
2024-05-01 10:31   ` Mike Leach
2024-05-17 10:09     ` James Clark
2024-05-07  6:00   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map arugment " James Clark
2024-04-29 15:30   ` James Clark
2024-04-29 15:21 ` [PATCH 12/17] coresight: Make CPU id map a property of a trace ID map James Clark
2024-05-07  6:22   ` Anshuman Khandual
2024-05-07  9:57     ` James Clark
2024-04-29 15:21 ` [PATCH 13/17] coresight: Pass trace ID map into source enable James Clark
2024-05-07  6:46   ` Anshuman Khandual
2024-05-07 10:49   ` Suzuki K Poulose
2024-04-29 15:22 ` [PATCH 14/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-05-03  9:43   ` Mike Leach
2024-05-03 14:31     ` James Clark
2024-05-07 10:52   ` Suzuki K Poulose
2024-05-17 10:07     ` James Clark
2024-04-29 15:22 ` [PATCH 15/17] coresight: Remove pending trace ID release mechanism James Clark
2024-04-29 15:22 ` [PATCH 16/17] coresight: Re-emit trace IDs when the sink changes in per-thread mode James Clark
2024-05-07 11:05   ` Suzuki K Poulose
2024-05-17 10:01     ` James Clark
2024-04-29 15:22 ` [PATCH 17/17] coresight: Emit HW_IDs for all ETMs that are using the sink James Clark
2024-05-03 12:40 ` [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions Mike Leach
2024-05-17 10:45   ` James Clark
2024-05-03 20:23 ` Arnaldo Carvalho de Melo
2024-05-07 10:01   ` James Clark
2024-05-07 14:59     ` Arnaldo Carvalho de Melo
2024-05-07 11:02 ` Ganapatrao Kulkarni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240429152207.479221-1-james.clark@arm.com \
    --to=james.clark@arm.com \
    --cc=acme@kernel.org \
    --cc=adrian.hunter@intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=alexandre.torgue@foss.st.com \
    --cc=coresight@lists.linaro.org \
    --cc=gankulkarni@os.amperecomputing.com \
    --cc=irogers@google.com \
    --cc=john.g.garry@oracle.com \
    --cc=jolsa@kernel.org \
    --cc=leo.yan@linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=linux-stm32@st-md-mailman.stormreply.com \
    --cc=mark.rutland@arm.com \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=mike.leach@linaro.org \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=peterz@infradead.org \
    --cc=scclevenger@os.amperecomputing.com \
    --cc=suzuki.poulose@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).