From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: Esther Shimanovich <eshimanovich@chromium.org>,
Mario Limonciello <mario.limonciello@amd.com>,
Dmitry Torokhov <dmitry.torokhov@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Rajat Jain <rajatja@google.com>
Subject: Re: [PATCH v4] PCI: Relabel JHL6540 on Lenovo X1 Carbon 7,8
Date: Thu, 16 May 2024 13:03:15 +0300 [thread overview]
Message-ID: <20240516100315.GC1421138@black.fi.intel.com> (raw)
In-Reply-To: <20240516083017.GA1421138@black.fi.intel.com>
On Thu, May 16, 2024 at 11:30:17AM +0300, Mika Westerberg wrote:
> Hi,
>
> On Wed, May 15, 2024 at 10:35:22PM +0200, Lukas Wunner wrote:
> > On Wed, May 15, 2024 at 02:53:54PM -0400, Esther Shimanovich wrote:
> > > On Wed, May 8, 2024 at 1:23???AM Lukas Wunner <lukas@wunner.de> wrote:
> > > > On Wed, May 01, 2024 at 06:23:28PM -0400, Esther Shimanovich wrote:
> > > > > On Sat, Apr 27, 2024 at 3:17AM Lukas Wunner <lukas@wunner.de> wrote:
> > > > > That is correct, when the user-visible issue occurs, no driver is
> > > > > bound to the NHI and XHCI. The discrete JHL chip is not permitted to
> > > > > attach to the external-facing root port because of the security
> > > > > policy, so the NHI and XHCI are not seen by the computer.
> > > >
> > > > Could you rework your patch to only rectify the NHI's and XHCI's
> > > > device properties and leave the bridges untouched?
> > >
> > > So I tried a build with that patch, but it never reached the
> > > tb_pci_fixup function
> >
> > That means that for some reason, the PCI devices are not associated with
> > the Thunderbolt ports. Could you add this to the command line:
> >
> > thunderbolt.dyndbg ignore_loglevel log_buf_len=10M
> >
> > and this to your kernel config:
> >
> > CONFIG_DYNAMIC_DEBUG=y
> >
> > You should see "... is associated with ..." messages in dmesg.
> > This did work for Mika during his testing with recent Thunderbolt chips.
> > I amended the patches after his testing but wouldn't expect that to
> > cause issues.
> >
> > @Mika, would you mind re-testing if you've got cycles to spare?
>
> Sure, I'll try this today and update.
Okay now tried with your latest branch on Meteor Lake-P (integrated
Thunderbolt). I do get these:
[ 12.911728] thunderbolt 0000:00:0d.2: 0:8: associated with 0000:00:07.0
[ 12.911732] thunderbolt 0000:00:0d.2: 0:9: associated with 0000:00:07.1
...
[ 13.250242] thunderbolt 0000:00:0d.3: 0:8: associated with 0000:00:07.2
[ 13.250245] thunderbolt 0000:00:0d.3: 0:9: associated with 0000:00:07.3
The adapters 8 and 9 are PCIe as expected
# tbadapters -r 0 -a 8 -a 9
8: PCIe Down Disabled
9: PCIe Down Disabled
# tbadapters -d1 -r 0 -a 8 -a 9
8: PCIe Down Disabled
9: PCIe Down Disabled
And the 07.[0-3] are the PCIe Thunderbolt Root Ports:
# lspci
...
00:07.0 PCI bridge: Intel Corporation Meteor Lake-P Thunderbolt 4 PCI Express Root Port #0 (rev 10)
00:07.1 PCI bridge: Intel Corporation Meteor Lake-P Thunderbolt 4 PCI Express Root Port #1 (rev 10)
00:07.2 PCI bridge: Intel Corporation Meteor Lake-P Thunderbolt 4 PCI Express Root Port #2 (rev 10)
00:07.3 PCI bridge: Intel Corporation Meteor Lake-P Thunderbolt 4 PCI Express Root Port #3 (rev 10)
...
next prev parent reply other threads:[~2024-05-16 10:03 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 20:53 [PATCH v4] PCI: Relabel JHL6540 on Lenovo X1 Carbon 7,8 Esther Shimanovich
2023-12-21 23:15 ` Dmitry Torokhov
2023-12-27 0:15 ` Bjorn Helgaas
2023-12-28 13:25 ` Lukas Wunner
2023-12-28 13:39 ` Mika Westerberg
2024-01-17 21:21 ` Esther Shimanovich
2024-01-18 6:00 ` Mika Westerberg
2024-01-18 15:47 ` Mario Limonciello
2024-01-18 16:12 ` Dmitry Torokhov
2024-01-18 16:21 ` Dmitry Torokhov
2024-01-19 5:37 ` Mika Westerberg
2024-01-19 7:48 ` Mika Westerberg
2024-01-19 10:22 ` Mika Westerberg
2024-01-19 16:03 ` Esther Shimanovich
2024-01-22 6:10 ` Mika Westerberg
2024-01-22 23:50 ` Mario Limonciello
2024-01-23 6:18 ` Mika Westerberg
2024-01-25 23:45 ` Esther Shimanovich
2024-04-15 22:34 ` Esther Shimanovich
2024-04-16 5:03 ` Mika Westerberg
2024-04-18 19:43 ` Esther Shimanovich
2024-04-19 4:49 ` Mika Westerberg
2024-04-22 19:17 ` Esther Shimanovich
2024-04-22 19:21 ` Mario Limonciello
2024-04-23 5:33 ` Mika Westerberg
2024-04-23 8:31 ` Lukas Wunner
2024-04-23 8:40 ` Mika Westerberg
2024-04-23 16:59 ` Mario Limonciello
2024-04-24 8:56 ` Mika Westerberg
2024-04-25 21:16 ` Esther Shimanovich
2024-04-26 4:52 ` Mika Westerberg
2024-04-26 15:58 ` Esther Shimanovich
2024-04-27 5:35 ` Lukas Wunner
2024-04-27 7:41 ` Mika Westerberg
2024-04-27 7:08 ` Lukas Wunner
2024-04-27 15:09 ` Lukas Wunner
2024-05-01 22:23 ` Esther Shimanovich
2024-05-02 4:38 ` Mika Westerberg
2024-05-02 9:54 ` Mario Limonciello
2024-05-02 10:07 ` Mika Westerberg
2024-05-08 5:14 ` Lukas Wunner
2024-05-10 5:26 ` Mika Westerberg
2024-05-10 15:44 ` Esther Shimanovich
2024-05-11 4:38 ` Mika Westerberg
2024-05-11 5:43 ` Mika Westerberg
2024-05-15 18:53 ` Esther Shimanovich
2024-05-15 20:35 ` Lukas Wunner
2024-05-15 20:51 ` Lukas Wunner
2024-05-15 21:44 ` Esther Shimanovich
2024-05-16 8:30 ` Mika Westerberg
2024-05-16 10:03 ` Mika Westerberg [this message]
2024-05-16 9:16 ` Mika Westerberg
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