From: Aleksandr Mishin <amishin@t-argos.ru>
To: Jonathan Chocron <jonnyc@amazon.com>
Cc: "Aleksandr Mishin" <amishin@t-argos.ru>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
lvc-project@linuxtesting.org,
"Bjorn Helgaas" <helgaas@kernel.org>
Subject: [PATCH v3] PCI: dwc: al: Check IORESOURCE_BUS existence during PCIe config preparation
Date: Fri, 3 May 2024 15:57:05 +0300 [thread overview]
Message-ID: <20240503125705.46055-1-amishin@t-argos.ru> (raw)
In-Reply-To: <20240328180126.23574-1-amishin@t-argos.ru>
If IORESOURCE_BUS is not provided in Device Tree it will be fabricated
in of_pci_parse_bus_range(). So NULL pointer dereference will not occur.
But other drivers do this check. So it can be added for code consistency.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Suggested-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Aleksandr Mishin <amishin@t-argos.ru>
---
v1->v2: Add return code processing as suggested by Bjorn
v2->v3: Return -ENODEV instead of -EINVAL
drivers/pci/controller/dwc/pcie-al.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-al.c b/drivers/pci/controller/dwc/pcie-al.c
index 6dfdda59f328..643115f74092 100644
--- a/drivers/pci/controller/dwc/pcie-al.c
+++ b/drivers/pci/controller/dwc/pcie-al.c
@@ -242,18 +242,24 @@ static struct pci_ops al_child_pci_ops = {
.write = pci_generic_config_write,
};
-static void al_pcie_config_prepare(struct al_pcie *pcie)
+static int al_pcie_config_prepare(struct al_pcie *pcie)
{
struct al_pcie_target_bus_cfg *target_bus_cfg;
struct dw_pcie_rp *pp = &pcie->pci->pp;
unsigned int ecam_bus_mask;
+ struct resource_entry *ft;
u32 cfg_control_offset;
+ struct resource *bus;
u8 subordinate_bus;
u8 secondary_bus;
u32 cfg_control;
u32 reg;
- struct resource *bus = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS)->res;
+ ft = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS);
+ if (!ft)
+ return -ENODEV;
+
+ bus = ft->res;
target_bus_cfg = &pcie->target_bus_cfg;
ecam_bus_mask = (pcie->ecam_size >> PCIE_ECAM_BUS_SHIFT) - 1;
@@ -287,6 +293,8 @@ static void al_pcie_config_prepare(struct al_pcie *pcie)
FIELD_PREP(CFG_CONTROL_SEC_BUS_MASK, secondary_bus);
al_pcie_controller_writel(pcie, cfg_control_offset, reg);
+
+ return 0;
}
static int al_pcie_host_init(struct dw_pcie_rp *pp)
@@ -305,7 +313,9 @@ static int al_pcie_host_init(struct dw_pcie_rp *pp)
if (rc)
return rc;
- al_pcie_config_prepare(pcie);
+ rc = al_pcie_config_prepare(pcie);
+ if (rc)
+ return rc;
return 0;
}
--
2.30.2
next prev parent reply other threads:[~2024-05-03 13:09 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-28 18:01 [PATCH] PCI: dwc: Fix potential NULL dereference Aleksandr Mishin
2024-03-28 18:32 ` Bjorn Helgaas
2024-04-25 9:45 ` [PATCH v2] PCI: dwc: al: " Aleksandr Mishin
2024-05-03 12:57 ` Aleksandr Mishin [this message]
2024-05-17 11:24 ` [PATCH v3] PCI: dwc: al: Check IORESOURCE_BUS existence during PCIe config preparation Krzysztof Wilczyński
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