From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <iommu@lists.linux.dev>, Joerg Roedel <joro@8bytes.org>,
<linux-arm-kernel@lists.infradead.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Moritz Fischer <mdf@kernel.org>,
Michael Shavit <mshavit@google.com>, <patches@lists.linux.dev>,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v7 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used
Date: Tue, 14 May 2024 17:32:25 -0700 [thread overview]
Message-ID: <ZkQCmSc+/8haHj2P@nvidia.com> (raw)
In-Reply-To: <ZkPtnTfup2snod+/@nvidia.com>
On Tue, May 14, 2024 at 08:02:53PM -0300, Jason Gunthorpe wrote:
> On Mon, May 13, 2024 at 12:11:28AM -0700, Nicolin Chen wrote:
> > On Wed, May 08, 2024 at 03:57:19PM -0300, Jason Gunthorpe wrote:
> > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > > index 15378c131a5bc7..41d7a0664a445d 100644
> > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > > @@ -991,6 +991,14 @@ void arm_smmu_get_ste_used(const __le64 *ent, __le64 *used_bits)
> > > STRTAB_STE_1_S1STALLD | STRTAB_STE_1_STRW |
> > > STRTAB_STE_1_EATS);
> > > used_bits[2] |= cpu_to_le64(STRTAB_STE_2_S2VMID);
> > > +
> > > + /*
> > > + * See 13.5 Summary of attribute/permission configuration fields
> > > + * for the SHCFG behavior.
> > > + */
> > > + if (FIELD_GET(STRTAB_STE_1_S1DSS, le64_to_cpu(ent[1])) ==
> > > + STRTAB_STE_1_S1DSS_BYPASS)
> > > + used_bits[1] |= cpu_to_le64(STRTAB_STE_1_SHCFG);
> >
> > Should we check ARM_SMMU_FEAT_ATTR_TYPES_OVR here as well?
>
> It isn't needed, this is just checking relationships, it is up to the
> make functions to set the correct bits based on things like FEAT data.
>
> > The SHCFG is RES0 when !ARM_SMMU_FEAT_ATTR_TYPES_OVR. So, the
> > used_bits[1] doesn't need to include it in this case?
>
> In the not-supported case then the bit will always be zero from all
> make functions and so this will all do nothing.
I see. Thanks for the clarification.
Nicolin
next prev parent reply other threads:[~2024-05-15 0:32 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 18:57 [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 01/14] iommu/arm-smmu-v3: Convert to domain_alloc_sva() Jason Gunthorpe
2024-05-09 18:21 ` Nicolin Chen
2024-05-09 18:40 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 02/14] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-05-11 2:32 ` Nicolin Chen
2024-05-12 13:12 ` Jason Gunthorpe
2024-05-12 20:54 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 03/14] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-05-11 3:12 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-05-11 21:56 ` Nicolin Chen
2024-05-24 15:46 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 05/14] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-05-12 9:03 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 06/14] iommu/arm-smmu-v3: Do not use master->sva_enable to restrict attaches Jason Gunthorpe
2024-05-13 6:01 ` Nicolin Chen
2024-05-13 20:58 ` Nicolin Chen
2024-05-14 22:51 ` Jason Gunthorpe
2024-05-15 0:36 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 07/14] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-05-13 6:32 ` Nicolin Chen
2024-05-13 22:28 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 08/14] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-05-13 6:36 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 09/14] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-05-13 6:41 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 10/14] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-05-13 21:23 ` Nicolin Chen
2024-05-17 19:48 ` Jason Gunthorpe
2024-05-17 20:34 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-05-13 7:11 ` Nicolin Chen
2024-05-14 23:02 ` Jason Gunthorpe
2024-05-15 0:32 ` Nicolin Chen [this message]
2024-05-08 18:57 ` [PATCH v7 12/14] iommu/arm-smmu-v3: Test the STE S1DSS functionality Jason Gunthorpe
2024-05-13 21:34 ` Nicolin Chen
2024-05-08 18:57 ` [PATCH v7 13/14] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-05-13 8:31 ` Nicolin Chen
2024-05-21 17:51 ` Jason Gunthorpe
2024-05-08 18:57 ` [PATCH v7 14/14] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-05-13 8:34 ` Nicolin Chen
2024-05-09 9:39 ` [PATCH v7 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Nicolin Chen
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