From: Christian Loehle <christian.loehle@arm.com>
To: Maxim Kiselev <bigunclemax@gmail.com>, serghox@gmail.com
Cc: adrian.hunter@intel.com, jyanchou@realtek.com,
open list <linux-kernel@vger.kernel.org>,
linux-mmc@vger.kernel.org, quic_asutoshd@quicinc.com,
ritesh.list@gmail.com, shawn.lin@rock-chips.com,
Ulf Hansson <ulf.hansson@linaro.org>
Subject: Re: [PATCH v7 0/2] mmc: sdhci-of-dwcmshc: Add CQE support
Date: Fri, 22 Mar 2024 14:07:29 +0000 [thread overview]
Message-ID: <32608c6b-df94-4dc8-be66-97a90b6eeac4@arm.com> (raw)
In-Reply-To: <CALHCpMiUfa0j46HcorZGPDPV5Zg5ZFdWukT+5jTediuKJuoB5w@mail.gmail.com>
On 20/03/2024 10:36, Maxim Kiselev wrote:
> Subject: [PATCH v7 0/2] mmc: sdhci-of-dwcmshc: Add CQE support
>
> Hi Sergey, Adrian!
>
> First of all I want to thank Sergey for supporting the CQE feature
> on the DWC MSHC controller.
>
> I tested this series on the LicheePi 4A board (TH1520 SoC).
> It has the DWC MSHC IP too and according to the T-Head datasheet
> it also supports the CQE feature.
>
>> Supports Command Queuing Engine (CQE) and compliant with eMMC CQ HCI.
>
> So, to enable CQE on LicheePi 4A need to set a prop in DT
> and add a IRQ handler to th1520_ops:
>> .irq = dwcmshc_cqe_irq_handler,
>
> And the CQE will work for th1520 SoC too.
>
> But, when I enabled the CQE, I was faced with a strange effect.
>
> The fio benchmark shows that emmc works ~2.5 slower with enabled CQE.
> 219MB/s w/o CQE vs 87.4MB/s w/ CQE. I'll put logs below.
>
> I would be very appreciative if you could point me where to look for
> the bottleneck.
>
> Without CQE:
I would also suspect some bus issues here, either read out ios or ext_csd
after enabling CQE, it could be helpful.
OTOH the CQE could just be limiting the frequency, which you wouldn't be
able to see without a scope. Does the TRM say anything about that?
Are you limited to <100MB/s with CQE for HS400(non-ES) and HS200, too?
What about sequential reads but smaller bs? like 256K sequential?
FWIW your fio call should be on par with non-CQE performance-wise at best,
as you just have one IO in-flight, i.e. no CQE performance improvement
possible, see your warning:
> both iodepth >= 1 and synchronous I/O engine are selected, queue
> depth will be capped at 1
Kind Regards,
Christian
next prev parent reply other threads:[~2024-03-22 14:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 10:36 [PATCH v7 0/2] mmc: sdhci-of-dwcmshc: Add CQE support Maxim Kiselev
2024-03-21 6:40 ` Adrian Hunter
2024-03-22 14:07 ` Christian Loehle [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-03-19 11:59 Sergey Khimich
2024-03-25 13:19 ` Ulf Hansson
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