From: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
To: Andi Shyti <andi.shyti@kernel.org>
Cc: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
Eng Lee Teh <englee.teh@starfivetech.com>
Subject: [PATCH] [RESEND] i2c: cadence: Add RISCV architecture support
Date: Tue, 23 Apr 2024 10:48:06 +0800 [thread overview]
Message-ID: <20240423024805.1915300-2-jisheng.teoh@starfivetech.com> (raw)
Add RISCV support to Cadence I2C Kconfig which is used in platform
such as the StarFive JH8100.
Signed-off-by: Eng Lee Teh <englee.teh@starfivetech.com>
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
---
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 97989c914260..8461328d11d8 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -500,7 +500,7 @@ config I2C_BRCMSTB
config I2C_CADENCE
tristate "Cadence I2C Controller"
- depends on ARCH_ZYNQ || ARM64 || XTENSA || COMPILE_TEST
+ depends on ARCH_ZYNQ || ARM64 || XTENSA || RISCV || COMPILE_TEST
help
Say yes here to select Cadence I2C Host Controller. This controller is
e.g. used by Xilinx Zynq.
--
2.43.2
next reply other threads:[~2024-04-23 4:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-23 2:48 Ji Sheng Teoh [this message]
2024-04-23 10:45 ` [PATCH] [RESEND] i2c: cadence: Add RISCV architecture support Andi Shyti
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