From: Xu Yilun <yilun.xu@intel.com>
To: Nava kishore Manne <nava.kishore.manne@amd.com>
Cc: mdf@kernel.org, hao.wu@intel.com, trix@redhat.com,
michal.simek@xilinx.com, linux-fpga@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] fpga: zynq: Add parse_header ops support
Date: Sat, 18 Mar 2023 17:48:29 +0800 [thread overview]
Message-ID: <ZBWI7TrwssjjRsc9@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20230314121754.297264-1-nava.kishore.manne@amd.com>
On 2023-03-14 at 17:47:54 +0530, Nava kishore Manne wrote:
> The commit 3cc624beba63 ("fpga: fpga-mgr: support bitstream offset in
> image buffer") added a new parse_header ops to handle the header related
> stuff in the fpga framework. So moved the header validation logic from
> write_init() to parse_header().
>
> Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
> ---
> drivers/fpga/zynq-fpga.c | 23 ++++++++++++++++-------
> 1 file changed, 16 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
> index ae0da361e6c6..6e5df0193028 100644
> --- a/drivers/fpga/zynq-fpga.c
> +++ b/drivers/fpga/zynq-fpga.c
> @@ -248,6 +248,21 @@ static bool zynq_fpga_has_sync(const u8 *buf, size_t count)
> return false;
> }
>
> +static int zynq_fpga_ops_parse_header(struct fpga_manager *mgr,
> + struct fpga_image_info *info,
> + const char *buf, size_t count)
> +{
> + if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
> + if (!zynq_fpga_has_sync(buf, count)) {
FPGA manager may pass in the whole image if it is already mapped, maybe
only info->header_size should be checked?
Thanks,
Yilun
> + dev_err(&mgr->dev,
> + "Invalid bitstream, could not find a sync word. Bitstream must be a byte swapped .bin file\n");
> + return -EINVAL;
> + }
> + }
> +
> + return 0;
> +}
> +
> static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
> struct fpga_image_info *info,
> const char *buf, size_t count)
> @@ -275,13 +290,6 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
>
> /* don't globally reset PL if we're doing partial reconfig */
> if (!(info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
> - if (!zynq_fpga_has_sync(buf, count)) {
> - dev_err(&mgr->dev,
> - "Invalid bitstream, could not find a sync word. Bitstream must be a byte swapped .bin file\n");
> - err = -EINVAL;
> - goto out_err;
> - }
> -
> /* assert AXI interface resets */
> regmap_write(priv->slcr, SLCR_FPGA_RST_CTRL_OFFSET,
> FPGA_RST_ALL_MASK);
> @@ -545,6 +553,7 @@ static enum fpga_mgr_states zynq_fpga_ops_state(struct fpga_manager *mgr)
> static const struct fpga_manager_ops zynq_fpga_ops = {
> .initial_header_size = 128,
> .state = zynq_fpga_ops_state,
> + .parse_header = zynq_fpga_ops_parse_header,
> .write_init = zynq_fpga_ops_write_init,
> .write_sg = zynq_fpga_ops_write,
> .write_complete = zynq_fpga_ops_write_complete,
> --
> 2.25.1
>
prev parent reply other threads:[~2023-03-18 10:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 12:17 [PATCH] fpga: zynq: Add parse_header ops support Nava kishore Manne
2023-03-18 9:48 ` Xu Yilun [this message]
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