From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <tony.luck@intel.com>,
<x86@kernel.org>, <Avadhut.Naik@amd.com>,
<Smita.KoralahalliChannabasappa@amd.com>,
<amd-gfx@lists.freedesktop.org>,
<linux-trace-kernel@vger.kernel.org>,
"Yazen Ghannam" <yazen.ghannam@amd.com>
Subject: [PATCH 01/20] x86/mce/inject: Clear test status value
Date: Sat, 18 Nov 2023 13:32:29 -0600 [thread overview]
Message-ID: <20231118193248.1296798-2-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20231118193248.1296798-1-yazen.ghannam@amd.com>
AMD systems generally allow MCA "simulation" where MCA registers can be
written with valid data and the full MCA handling flow can be tested by
software.
However, the Platform on Scalable MCA systems, may prevent software
from writing data to the MCA registers. There is no architectural way to
determine this configuration. Therefore, the MCE Inject module will
check for this behavior by writing and reading back a test status value.
This is done during module init, and the check can run on any CPU with
any valid MCA bank.
If MCA_STATUS writes are ignored by the Platform, then there are no side
effects on the hardware state.
If the writes are not ignored, then the test status value will remain in
the hardware MCA_STATUS register. It is likely that the value will not
be overwritten by hardware or software, since the tested CPU and bank
are arbitrary. Therefore, the user may see a spurious, synthetic MCA
error reported whenever MCA is polled for this CPU.
Clear the test value immediately after writing it. It is very unlikely
that a valid MCA error is logged by hardware during the test. Errors
that cause an #MC won't be affected.
Fixes: 891e465a1bd8 ("x86/mce: Check whether writes to MCA_STATUS are getting ignored")
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kernel/cpu/mce/inject.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index 4d8d4bcf915d..72f0695c3dc1 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -746,6 +746,7 @@ static void check_hw_inj_possible(void)
wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), status);
rdmsrl_safe(mca_msr_reg(bank, MCA_STATUS), &status);
+ wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), 0);
if (!status) {
hw_injection_possible = false;
--
2.34.1
next prev parent reply other threads:[~2023-11-18 19:33 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-18 19:32 [PATCH 00/20] MCA Updates Yazen Ghannam
2023-11-18 19:32 ` Yazen Ghannam [this message]
2023-11-18 19:32 ` [PATCH 02/20] x86/mce: Define mce_setup() helpers for global and per-CPU fields Yazen Ghannam
2023-11-22 18:24 ` Borislav Petkov
2023-11-27 14:52 ` Yazen Ghannam
2023-11-18 19:32 ` [PATCH 03/20] x86/mce: Use mce_setup() helpers for apei_smca_report_x86_error() Yazen Ghannam
2023-11-22 18:28 ` Borislav Petkov
2023-11-27 14:53 ` Yazen Ghannam
2023-11-18 19:32 ` [PATCH 04/20] x86/mce/amd, EDAC/mce_amd: Move long names to decoder module Yazen Ghannam
2023-11-18 19:32 ` [PATCH 05/20] x86/mce/amd: Use helper for UMC bank type check Yazen Ghannam
2023-11-27 11:43 ` Borislav Petkov
2023-11-27 15:00 ` Yazen Ghannam
2023-11-18 19:32 ` [PATCH 06/20] x86/mce/amd: Use helper for GPU UMC bank type checks Yazen Ghannam
2023-11-27 11:46 ` Borislav Petkov
2023-11-27 15:12 ` Yazen Ghannam
2023-11-18 19:32 ` [PATCH 07/20] x86/mce/amd: Use fixed bank number for quirks Yazen Ghannam
2023-11-18 19:32 ` [PATCH 08/20] x86/mce/amd: Look up bank type by IPID Yazen Ghannam
2023-11-18 19:32 ` [PATCH 09/20] x86/mce/amd: Clean up SMCA configuration Yazen Ghannam
2023-11-18 19:32 ` [PATCH 10/20] x86/mce/amd: Prep DFR handler before enabling banks Yazen Ghannam
2023-11-18 19:32 ` [PATCH 11/20] x86/mce/amd: Simplify DFR handler setup Yazen Ghannam
2023-11-18 19:32 ` [PATCH 12/20] x86/mce/amd: Clean up enable_deferred_error_interrupt() Yazen Ghannam
2023-11-18 19:32 ` [PATCH 13/20] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2023-11-18 19:32 ` [PATCH 14/20] x86/mce/amd: Unify AMD DFR " Yazen Ghannam
2023-11-18 19:32 ` [PATCH 15/20] x86/mce: Skip AMD threshold init if no threshold banks found Yazen Ghannam
2023-11-18 19:32 ` [PATCH 16/20] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2023-11-18 19:32 ` [PATCH 17/20] x86/mce: Add wrapper for struct mce to export vendor specific info Yazen Ghannam
2023-11-18 19:32 ` [PATCH 18/20] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers Yazen Ghannam
2023-11-18 19:32 ` [PATCH 19/20] x86/mce/apei: Handle variable register array size Yazen Ghannam
2023-11-18 19:32 ` [PATCH 20/20] EDAC/mce_amd: Add support for FRU Text in MCA Yazen Ghannam
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