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From: Dave Jiang <dave.jiang@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: linux-cxl@vger.kernel.org, dan.j.williams@intel.com,
	ira.weiny@intel.com, vishal.l.verma@intel.com,
	alison.schofield@intel.com, dave@stgolabs.net
Subject: Re: [PATCH v4 1/4] cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_perf'
Date: Tue, 26 Mar 2024 15:07:16 -0700	[thread overview]
Message-ID: <cc7c6252-6e92-48b1-96c2-54b9424f9ca3@intel.com> (raw)
In-Reply-To: <20240325171051.000033fb@Huawei.com>



On 3/25/24 10:10 AM, Jonathan Cameron wrote:
> 
>> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
>> index 5303d6942b88..20fb3b35e89e 100644
>> --- a/drivers/cxl/cxlmem.h
>> +++ b/drivers/cxl/cxlmem.h
>> @@ -395,13 +395,11 @@ enum cxl_devtype {
>>  
>>  /**
>>   * struct cxl_dpa_perf - DPA performance property entry
>> - * @list - list entry
>>   * @dpa_range - range for DPA address
>>   * @coord - QoS performance data (i.e. latency, bandwidth)
>>   * @qos_class - QoS Class cookies
>>   */
>>  struct cxl_dpa_perf {
>> -	struct list_head list;
>>  	struct range dpa_range;
>>  	struct access_coordinate coord;
>>  	int qos_class;
>> @@ -471,8 +469,8 @@ struct cxl_dev_state {
>>   * @security: security driver state info
>>   * @fw: firmware upload / activation state
>>   * @mbox_send: @dev specific transport for transmitting mailbox commands
>> - * @ram_perf_list: performance data entries matched to RAM
>> - * @pmem_perf_list: performance data entries matched to PMEM
>> + * @ram_perf: performance data entry matched to RAM partition
>> + * @pmem_perf: performance data entry matched to PMEM partition
> 
> Just noticed in review of DCD but these are in wrong place in docs.
> Intentional or accident?

Most likely accidental from moving code around.

> 
>>   *
>>   * See CXL 3.0 8.2.9.8.2 Capacity Configuration and Label Storage for
>>   * details on capacity parameters.
>> @@ -494,8 +492,8 @@ struct cxl_memdev_state {
>>  	u64 next_volatile_bytes;
>>  	u64 next_persistent_bytes;
>>  
>> -	struct list_head ram_perf_list;
>> -	struct list_head pmem_perf_list;
>> +	struct cxl_dpa_perf ram_perf;
>> +	struct cxl_dpa_perf pmem_perf;
>>  
>>  	struct cxl_event_state event;
>>  	struct cxl_poison_state poison;

  reply	other threads:[~2024-03-26 22:07 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-05 19:30 [PATCH v4 0/4] cxl: Fix memdev qos_class sysfs attributes Dave Jiang
2024-02-05 19:30 ` [PATCH v4 1/4] cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_perf' Dave Jiang
2024-03-25 17:10   ` Jonathan Cameron
2024-03-26 22:07     ` Dave Jiang [this message]
2024-02-05 19:30 ` [PATCH v4 2/4] cxl: Remove unnecessary type cast in cxl_qos_class_verify() Dave Jiang
2024-02-05 19:30 ` [PATCH v4 3/4] cxl: Fix sysfs export of qos_class for memdev Dave Jiang
2024-02-05 20:38   ` Dan Williams
2024-02-05 21:00     ` Dave Jiang
2024-02-05 19:30 ` [PATCH v4 4/4] cxl/test: Add support for qos_class checking Dave Jiang

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