From: Dan Williams <dan.j.williams@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<dan.j.williams@intel.com>, <ira.weiny@intel.com>,
<vishal.l.verma@intel.com>, <alison.schofield@intel.com>,
<dave@stgolabs.net>, <bhelgaas@google.com>, <lukas@wunner.de>
Subject: Re: [PATCH v3 3/4] PCI: Create new reset method to force SBR for CXL
Date: Thu, 4 Apr 2024 07:42:40 -0700 [thread overview]
Message-ID: <660ebc608e2b3_2459629474@dwillia2-mobl3.amr.corp.intel.com.notmuch> (raw)
In-Reply-To: <20240404142909.00002084@Huawei.com>
Jonathan Cameron wrote:
[..]
> > > Maybe a guard() use case to allow early returns in error paths?
> >
> > I'm not seeing a good way to do it. pci_cfg_access_lock/unlock() isn't like your typical lock/unlock. It locks, changes some pci_dev internal stuff, and then unlocks in both functions. The pci_lock isn't being held after lock() call.
> >
>
> You've lost me.
>
> Why does guard() care about the internals?
>
> All it does is stash a copy of the '_lock' - here the bridge struct
> pci_dev then call the _unlock on it when the stashed copy of that
> pointer when it goes out of scope.
Agree, and I suggested offlist to just use pci_dev_lock() similar to
pci_reset_function(). There is already a guard() for that, and
pci_dev_lock() is amenable to lockdep.
next prev parent reply other threads:[~2024-04-04 14:42 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-02 23:45 [PATCH 0/4 v3] PCI: Add Secondary Bus Reset (SBR) support for CXL Dave Jiang
2024-04-02 23:45 ` [PATCH v3 1/4] PCI/cxl: Move PCI CXL vendor Id to a common location from CXL subsystem Dave Jiang
2024-04-02 23:45 ` [PATCH v3 2/4] PCI: Add check for CXL Secondary Bus Reset Dave Jiang
2024-04-03 8:26 ` Lukas Wunner
2024-04-04 0:19 ` Dave Jiang
2024-04-03 15:01 ` Jonathan Cameron
2024-04-02 23:45 ` [PATCH v3 3/4] PCI: Create new reset method to force SBR for CXL Dave Jiang
2024-04-03 15:09 ` Jonathan Cameron
2024-04-04 0:21 ` Dave Jiang
2024-04-04 13:29 ` Jonathan Cameron
2024-04-04 14:42 ` Dan Williams [this message]
2024-04-02 23:45 ` [PATCH v3 4/4] cxl: Add post reset warning if reset is detected as Secondary Bus Reset (SBR) Dave Jiang
2024-04-03 15:32 ` Jonathan Cameron
2024-04-03 16:27 ` Dan Williams
2024-04-04 13:16 ` Jonathan Cameron
2024-04-04 8:51 ` Lukas Wunner
2024-04-04 13:13 ` Jonathan Cameron
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