From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: wens@csie.org
Cc: samuel@sholland.org, sboyd@kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
Chad Wagner <wagnerch42@gmail.com>
Subject: Re: [PATCH] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change
Date: Mon, 15 Apr 2024 23:04:43 +0200 [thread overview]
Message-ID: <2929835.e9J7NaK4W3@jernej-laptop> (raw)
In-Reply-To: <CAGb2v651T28yrkaAbX3ckV8gEsYXdGgHMgCb3Jdmbej2OnNyLQ@mail.gmail.com>
Dne sobota, 2. marec 2024 ob 12:42:11 GMT +2 je Chen-Yu Tsai napisal(a):
> On Sat, Oct 14, 2023 at 2:17 AM Jernej Skrabec <jernej.skrabec@gmail.com> wrote:
> >
> > While PLL CPUX clock rate change when CPU is running from it works in
> > vast majority of cases, now and then it causes instability. This leads
> > to system crashes and other undefined behaviour. After a lot of testing
> > (30+ hours) while also doing a lot of frequency switches, we can't
> > observe any instability issues anymore when doing reparenting to stable
> > clock like 24 MHz oscillator.
> >
> > Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> > Reported-by: Chad Wagner <wagnerch42@gmail.com>
> > Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/
> > Tested-by: Chad Wagner <wagnerch42@gmail.com>
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
>
Applied.
Best regards,
Jernej
prev parent reply other threads:[~2024-04-15 21:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 18:17 [PATCH] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change Jernej Skrabec
2024-03-02 11:42 ` Chen-Yu Tsai
2024-04-15 21:04 ` Jernej Škrabec [this message]
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