From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: "AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Rob Herring" <robh@kernel.org>,
linux-clk@vger.kernel.org,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
linux-mediatek@lists.infradead.org,
"Michael Turquette" <mturquette@baylibre.com>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Chen-Yu Tsai" <wenst@chromium.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Stephen Boyd" <sboyd@kernel.org>,
devicetree@vger.kernel.org,
"Alper Nebi Yasak" <alpernebiyasak@gmail.com>
Subject: [RESEND PATCH v2 1/2] clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module
Date: Wed, 15 May 2024 11:51:04 +0300 [thread overview]
Message-ID: <20240515085137.2842804-1-alpernebiyasak@gmail.com> (raw)
The MT8173 infracfg clock driver does initialization in two steps, via a
CLK_OF_DECLARE_DRIVER declaration. However its early init function
doesn't get to run when it's built as a module, presumably since it's
not loaded by the time it would have been called by of_clk_init(). This
causes its second-step probe() to return -ENOMEM when trying to register
clocks, as the necessary clock_data struct isn't initialized by the
first step.
MT2701 and MT6797 clock drivers also use this mechanism, but they try to
allocate the necessary clock_data structure if missing in the second
step. Mimic that for the MT8173 infracfg clock as well to make it work
as a module.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
Changes in v2:
- Rewrite patch subject for consistency
v1: https://lore.kernel.org/lkml/20231108213734.140707-1-alpernebiyasak@gmail.com/
drivers/clk/mediatek/clk-mt8173-infracfg.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c
index 2f2f074e231a..ecc8b0063ea5 100644
--- a/drivers/clk/mediatek/clk-mt8173-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c
@@ -98,7 +98,17 @@ CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg",
static int clk_mt8173_infracfg_probe(struct platform_device *pdev)
{
struct device_node *node = pdev->dev.of_node;
- int r;
+ int r, i;
+
+ if (!infra_clk_data) {
+ infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
+ if (!infra_clk_data)
+ return -ENOMEM;
+ } else {
+ for (i = 0; i < CLK_INFRA_NR_CLK; i++)
+ if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER))
+ infra_clk_data->hws[i] = ERR_PTR(-ENOENT);
+ }
r = mtk_clk_register_gates(&pdev->dev, node, infra_gates,
ARRAY_SIZE(infra_gates), infra_clk_data);
base-commit: 6ba6c795dc73c22ce2c86006f17c4aa802db2a60
--
2.43.0
next reply other threads:[~2024-05-15 8:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-15 8:51 Alper Nebi Yasak [this message]
2024-05-15 8:51 ` [RESEND PATCH v2 2/2] arm64: dts: mediatek: mt8173: Fix timer 13 MHz clock description Alper Nebi Yasak
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