From: "Goud, Srinivas" <srinivas.goud@amd.com>
To: "Goud, Srinivas" <srinivas.goud@amd.com>,
"wg@grandegger.com" <wg@grandegger.com>,
"mkl@pengutronix.de" <mkl@pengutronix.de>,
"davem@davemloft.net" <davem@davemloft.net>,
"edumazet@google.com" <edumazet@google.com>,
"kuba@kernel.org" <kuba@kernel.org>,
"pabeni@redhat.com" <pabeni@redhat.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Cc: "git (AMD-Xilinx)" <git@amd.com>,
"michal.simek@xilinx.com" <michal.simek@xilinx.com>,
"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"appana.durga.rao@xilinx.com" <appana.durga.rao@xilinx.com>
Subject: RE: [PATCH v7 0/3] can: xilinx_can: Add ECC feature support
Date: Tue, 19 Dec 2023 06:34:11 +0000 [thread overview]
Message-ID: <PH8PR12MB6675D8145EA3B95315186C72E197A@PH8PR12MB6675.namprd12.prod.outlook.com> (raw)
In-Reply-To: <1701080895-1475-1-git-send-email-srinivas.goud@amd.com>
Ping!
>-----Original Message-----
>From: Srinivas Goud <srinivas.goud@amd.com>
>Sent: Monday, November 27, 2023 3:58 PM
>To: wg@grandegger.com; mkl@pengutronix.de; davem@davemloft.net;
>edumazet@google.com; kuba@kernel.org; pabeni@redhat.com;
>robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>p.zabel@pengutronix.de
>Cc: git (AMD-Xilinx) <git@amd.com>; michal.simek@xilinx.com; linux-
>can@vger.kernel.org; netdev@vger.kernel.org; devicetree@vger.kernel.org;
>linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
>appana.durga.rao@xilinx.com; Goud, Srinivas <srinivas.goud@amd.com>
>Subject: [PATCH v7 0/3] can: xilinx_can: Add ECC feature support
>
>Add ECC feature support to Tx and Rx FIFOs for Xilinx CAN Controller.
>ECC is an IP configuration option where counter registers are added in IP for
>1bit/2bit ECC errors count and reset.
>Also driver reports 1bit/2bit ECC errors for FIFOs based on ECC error interrupts.
>
>Add xlnx,has-ecc optional property for Xilinx AXI CAN controller to support ECC
>if the ECC block is enabled in the HW.
>
>Add ethtool stats interface for getting all the ECC errors information.
>
>There is no public documentation for it available.
>
>---
>BRANCH: linux-can-next/master
>
>Changes in v7:
>Update with spinlock only for stats counters
>
>Changes in v6:
>Update commit description
>
>Changes in v5:
>Fix review comments
>Change the sequence of updates the stats Add get_strings and get_sset_count
>stats interface Use u64 stats helper function
>
>Changes in v4:
>Fix DT binding check warning
>Update xlnx,has-ecc property description
>
>Changes in v3:
>Update mailing list
>Update commit description
>
>Changes in v2:
>Address review comments
>Add ethtool stats interface
>Update commit description
>
>
>Srinivas Goud (3):
> dt-bindings: can: xilinx_can: Add 'xlnx,has-ecc' optional property
> can: xilinx_can: Add ECC support
> can: xilinx_can: Add ethtool stats interface for ECC errors
>
> .../devicetree/bindings/net/can/xilinx,can.yaml | 5 +
> drivers/net/can/xilinx_can.c | 159 ++++++++++++++++++++-
> 2 files changed, 160 insertions(+), 4 deletions(-)
>
>--
>2.1.1
prev parent reply other threads:[~2023-12-19 6:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 10:28 [PATCH v7 0/3] can: xilinx_can: Add ECC feature support Srinivas Goud
2023-11-27 10:28 ` [PATCH v7 1/3] dt-bindings: can: xilinx_can: Add 'xlnx,has-ecc' optional property Srinivas Goud
2023-11-27 10:28 ` [PATCH v7 2/3] can: xilinx_can: Add ECC support Srinivas Goud
2023-11-27 10:28 ` [PATCH v7 3/3] can: xilinx_can: Add ethtool stats interface for ECC errors Srinivas Goud
2023-12-19 6:34 ` Goud, Srinivas [this message]
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