From: Sibi Sankar <quic_sibis@quicinc.com>
To: <sudeep.holla@arm.com>, <cristian.marussi@arm.com>,
<andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<jassisinghbrar@gmail.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>,
<dmitry.baryshkov@linaro.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <quic_rgottimu@quicinc.com>,
<quic_kshivnan@quicinc.com>, <quic_sibis@quicinc.com>,
<conor+dt@kernel.org>, <quic_gkohli@quicinc.com>,
<quic_nkela@quicinc.com>, <quic_psodagud@quicinc.com>,
<abel.vesa@linaro.org>
Subject: [PATCH V4 0/5] qcom: x1e80100: Enable CPUFreq
Date: Mon, 22 Apr 2024 22:10:30 +0530 [thread overview]
Message-ID: <20240422164035.1045501-1-quic_sibis@quicinc.com> (raw)
This series enables CPUFreq support on the X1E SoC using the SCMI perf
protocol. This was originally part of the RFC: firmware: arm_scmi:
Qualcomm Vendor Protocol [1]. I've split it up so that this part can
land earlier.
V3:
* Fix Maintainer info in cpucp mbox bindings. [Bjorn]
* Fix copyright info in cpucp driver. [Bjorn]
* Drop unused APSS_CPUCP_TX_MBOX_IDR, value init and drv_data. [Bjorn/Dmitry]
* Convert to lower case hex. [Bjorn]
* Convert irq and dev to local variables. [Bjorn]
* Replace for and if with for_each_set_bit. [Bjorn]
* Document the need for spinlock. [Bjorn]
* Add space after " for aesthetics. [Bjorn]
* Fix err in calc and add fixes tag. [Bjorn]
* Include io.h and re-order platform_device.h
* Use GENMASK_ULL to generate APSS_CPUCP_RX_MBOX_CMD_MASK.
V2:
* Fix series version number [Rob]
* Pickup Rbs from Dimitry and Rob.
* Use power-domain instead of clocks. [Sudeep/Ulf]
* Rename sram sub-nodes according to schema. [Dmitry]
* Use BIT() instead of manual shift. [Dmitry]
* Define RX_MBOX_CMD to account for chan calculation. [Dmitry]
* Clear the bit instead of the entire status within the spinlock. [Dmitry]
* Use dev_err_probe instead. [Dmitry]
* Drop superfluous error message while handling errors from get_irq. [Dmitry]
* Use devm_mbox_controller_register and drop remove path. [Dmitry]
* Define TX_MBOX_CMD to account for chan calculation.
* Use cpucp->dev in probe path for conformity.
RFC V1:
* Use x1e80100 as the fallback for future SoCs using the cpucp-mbox
controller. [Krzysztoff/Konrad/Rob]
* Use chan->lock and chan->cl to detect if the channel is no longer
Available. [Dmitry]
* Use BIT() instead of using manual shifts. [Dmitry]
* Don't use integer as a pointer value. [Dmitry]
* Allow it to default to of_mbox_index_xlate. [Dmitry]
* Use devm_of_iomap. [Dmitry]
* Use module_platform_driver instead of module init/exit. [Dmitry]
* Get channel number using mailbox core (like other drivers) and
further simplify the driver by dropping setup_mbox func.
[1]: https://lore.kernel.org/lkml/20240117173458.2312669-1-quic_sibis@quicinc.com/#r
Other relevant Links:
https://lore.kernel.org/lkml/be2e475a-349f-4e98-b238-262dd7117a4e@linaro.org/
Sibi Sankar (5):
dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings
mailbox: Add support for QTI CPUCP mailbox controller
arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region
arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes
arm64: dts: qcom: x1e80100: Enable cpufreq
.../bindings/mailbox/qcom,cpucp-mbox.yaml | 49 +++++
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 91 ++++++---
drivers/mailbox/Kconfig | 8 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/qcom-cpucp-mbox.c | 179 ++++++++++++++++++
5 files changed, 304 insertions(+), 25 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
--
2.34.1
next reply other threads:[~2024-04-22 16:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 16:40 Sibi Sankar [this message]
2024-04-22 16:40 ` [PATCH V4 1/5] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings Sibi Sankar
2024-04-22 16:40 ` [PATCH V4 2/5] mailbox: Add support for QTI CPUCP mailbox controller Sibi Sankar
2024-04-22 23:17 ` Konrad Dybcio
2024-04-23 17:10 ` Sibi Sankar
2024-05-14 11:19 ` Sibi Sankar
2024-05-01 2:14 ` Jassi Brar
2024-05-14 9:36 ` Sibi Sankar
2024-05-03 12:48 ` Cristian Marussi
2024-05-14 10:54 ` Sibi Sankar
2024-04-22 16:40 ` [PATCH V4 3/5] arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region Sibi Sankar
2024-04-22 16:40 ` [PATCH V4 4/5] arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes Sibi Sankar
2024-04-22 16:40 ` [PATCH V4 5/5] arm64: dts: qcom: x1e80100: Enable cpufreq Sibi Sankar
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