From: Rolf Eike Beer <eb@emlix.com>
To: Matthew Wilcox <willy@infradead.org>,
linux-arch@vger.kernel.org, Alexandre Ghiti <alex@ghiti.fr>
Cc: Yin Fengwei <fengwei.yin@intel.com>,
linux-mm@kvack.org, linux-alpha@vger.kernel.org,
linux-csky@vger.kernel.org, linux-m68k@lists.linux-m68k.org,
linux-mips@vger.kernel.org, Dinh Nguyen <dinguyen@kernel.org>,
linux-parisc@vger.kernel.org, linux-sh@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, loongarch@lists.linux.dev,
openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org,
linux-riscv@lists.infradead.org, sparclinux@vger.kernel.org,
linux-xtensa@linux-xtensa.org
Subject: Re: API for setting multiple PTEs at once
Date: Mon, 20 Feb 2023 09:29:58 +0100 [thread overview]
Message-ID: <5649318.DvuYhMxLoT@devpool47> (raw)
In-Reply-To: <0bf59207-838b-2a0b-a95e-925a6bbf1913@ghiti.fr>
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On Dienstag, 14. Februar 2023 10:55:43 CET Alexandre Ghiti wrote:
> Hi Matthew,
>
> On 2/7/23 21:27, Matthew Wilcox wrote:
> > On Thu, Feb 02, 2023 at 09:14:23PM +0000, Matthew Wilcox wrote:
> >> For those of you not subscribed, linux-mm is currently discussing
> >> how best to handle page faults on large folios. I simply made it work
> >> when adding large folio support. Now Yin Fengwei is working on
> >> making it fast.
> >
> > OK, here's an actual implementation:
> >
> > https://lore.kernel.org/linux-mm/20230207194937.122543-3-willy@infradead.o
> > rg/
> >
> > It survives a run of xfstests. If your architecture doesn't store its
> > PFNs at PAGE_SHIFT, you're going to want to implement your own set_ptes(),
> > or you'll see entirely the wrong pages mapped into userspace. You may
> > also wish to implement set_ptes() if it can be done more efficiently
> > than __pte(pteval(pte) + PAGE_SIZE).
> >
> > Architectures that implement things like flush_icache_page() and
> > update_mmu_cache() may want to propose batched versions of those.
> > That's alpha, csky, m68k, mips, nios2, parisc, sh,
> > arm, loongarch, openrisc, powerpc, riscv, sparc and xtensa.
> > Maintainers BCC'd, mailing lists CC'd.
> >
> > I'm happy to collect implementations and submit them as part of a v6.
>
> Please find below the riscv implementation for set_ptes:
>
> diff --git a/arch/riscv/include/asm/pgtable.h
> b/arch/riscv/include/asm/pgtable.h
> index ebee56d47003..10bf812776a4 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -463,6 +463,20 @@ static inline void set_pte_at(struct mm_struct *mm,
> __set_pte_at(mm, addr, ptep, pteval);
> }
>
> +#define set_ptes set_ptes
> +static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
> + pte_t *ptep, pte_t pte, unsigned int nr)
> +{
> + for (;;) {
> + set_pte_at(mm, addr, ptep, pte);
> + if (--nr == 0)
> + break;
> + ptep++;
> + addr += PAGE_SIZE;
> + pte = __pte(pte_val(pte) + (1 << _PAGE_PFN_SHIFT));
> + }
> +}
Given that this is the same code as the original version (surprise!), what
about doing something like this in the generic code instead:
#ifndef PTE_PAGE_STEP
#define PTE_PAGE_STEP PAGE_SIZE
#endif
[…]
> + pte = __pte(pte_val(pte) + PTE_PAGE_STEP);
The name of the define is an obvious candidate for bike-shedding, feel free to
name it as you want.
Or if that isn't sound enough maybe introduce something like:
static inline pte_t
set_ptes_next_pte(pte_t pte)
{
return __pte(pte_val(pte) + (1 << _PAGE_PFN_SHIFT));
}
Greetings,
Eike
--
Rolf Eike Beer, emlix GmbH, http://www.emlix.com
Fon +49 551 30664-0, Fax +49 551 30664-11
Gothaer Platz 3, 37083 Göttingen, Germany
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emlix - smart embedded open source
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prev parent reply other threads:[~2023-02-20 8:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <Y9wnr8SGfGGbi/bk@casper.infradead.org>
2023-02-07 20:27 ` API for setting multiple PTEs at once Matthew Wilcox
2023-02-08 11:23 ` Alexandre Ghiti
2023-02-08 12:09 ` Yin, Fengwei
2023-02-08 13:35 ` Matthew Wilcox
2023-02-14 9:55 ` Alexandre Ghiti
2023-02-20 8:29 ` Rolf Eike Beer [this message]
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