From: Atish Patra <atishp@rivosinc.com>
To: Shenlin Liang <liangshenlin@eswincomputing.com>,
anup@brainfault.org, atishp@atishpatra.org,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, peterz@infradead.org,
mingo@redhat.com, acme@kernel.org, namhyung@kernel.org,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v3 2/2] perf kvm/riscv: Port perf kvm stat to RISC-V
Date: Fri, 3 May 2024 17:25:18 -0700 [thread overview]
Message-ID: <e4c61017-6667-4773-8f09-497002cbc6a9@rivosinc.com> (raw)
In-Reply-To: <20240422080833.8745-3-liangshenlin@eswincomputing.com>
On 4/22/24 01:08, Shenlin Liang wrote:
> 'perf kvm stat report/record' generates a statistical analysis of KVM
> events and can be used to analyze guest exit reasons.
>
> "report" reports statistical analysis of guest exit events.
>
> To record kvm events on the host:
> # perf kvm stat record -a
>
> To report kvm VM EXIT events:
> # perf kvm stat report --event=vmexit
>
> Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com>
> ---
> tools/perf/arch/riscv/Makefile | 1 +
> tools/perf/arch/riscv/util/Build | 1 +
> tools/perf/arch/riscv/util/kvm-stat.c | 79 +++++++++++++++++++
> .../arch/riscv/util/riscv_exception_types.h | 35 ++++++++
> 4 files changed, 116 insertions(+)
> create mode 100644 tools/perf/arch/riscv/util/kvm-stat.c
> create mode 100644 tools/perf/arch/riscv/util/riscv_exception_types.h
>
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index a8d25d005207..e1e445615536 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -3,3 +3,4 @@ PERF_HAVE_DWARF_REGS := 1
> endif
> PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> PERF_HAVE_JITDUMP := 1
> +HAVE_KVM_STAT_SUPPORT := 1
> \ No newline at end of file
> diff --git a/tools/perf/arch/riscv/util/Build b/tools/perf/arch/riscv/util/Build
> index 603dbb5ae4dc..d72b04f8d32b 100644
> --- a/tools/perf/arch/riscv/util/Build
> +++ b/tools/perf/arch/riscv/util/Build
> @@ -1,5 +1,6 @@
> perf-y += perf_regs.o
> perf-y += header.o
>
> +perf-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o
> perf-$(CONFIG_DWARF) += dwarf-regs.o
> perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
> diff --git a/tools/perf/arch/riscv/util/kvm-stat.c b/tools/perf/arch/riscv/util/kvm-stat.c
> new file mode 100644
> index 000000000000..58813049fc45
> --- /dev/null
> +++ b/tools/perf/arch/riscv/util/kvm-stat.c
> @@ -0,0 +1,79 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Arch specific functions for perf kvm stat.
> + *
> + * Copyright 2024 Beijing ESWIN Computing Technology Co., Ltd.
> + *
> + */
> +#include <errno.h>
> +#include <memory.h>
> +#include "../../../util/evsel.h"
> +#include "../../../util/kvm-stat.h"
> +#include "riscv_exception_types.h"
> +#include "debug.h"
> +
> +define_exit_reasons_table(riscv_exit_reasons, kvm_riscv_exception_class);
> +
> +const char *vcpu_id_str = "id";
> +const char *kvm_exit_reason = "scause";
> +const char *kvm_entry_trace = "kvm:kvm_entry";
> +const char *kvm_exit_trace = "kvm:kvm_exit";
> +
> +const char *kvm_events_tp[] = {
> + "kvm:kvm_entry",
> + "kvm:kvm_exit",
> + NULL,
> +};
> +
> +static void event_get_key(struct evsel *evsel,
> + struct perf_sample *sample,
> + struct event_key *key)
> +{
> + key->info = 0;
> + key->key = evsel__intval(evsel, sample, kvm_exit_reason);
> + key->key = (int)key->key;
> + key->exit_reasons = riscv_exit_reasons;
> +}
> +
> +static bool event_begin(struct evsel *evsel,
> + struct perf_sample *sample __maybe_unused,
> + struct event_key *key __maybe_unused)
> +{
> + return evsel__name_is(evsel, kvm_entry_trace);
> +}
> +
> +static bool event_end(struct evsel *evsel,
> + struct perf_sample *sample,
> + struct event_key *key)
> +{
> + if (evsel__name_is(evsel, kvm_exit_trace)) {
> + event_get_key(evsel, sample, key);
> + return true;
> + }
> + return false;
> +}
> +
> +static struct kvm_events_ops exit_events = {
> + .is_begin_event = event_begin,
> + .is_end_event = event_end,
> + .decode_key = exit_event_decode_key,
> + .name = "VM-EXIT"
> +};
> +
> +struct kvm_reg_events_ops kvm_reg_events_ops[] = {
> + {
> + .name = "vmexit",
> + .ops = &exit_events,
> + },
> + { NULL, NULL },
> +};
> +
> +const char * const kvm_skip_events[] = {
> + NULL,
> +};
> +
> +int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid __maybe_unused)
> +{
> + kvm->exit_reasons_isa = "riscv64";
> + return 0;
> +}
> diff --git a/tools/perf/arch/riscv/util/riscv_exception_types.h b/tools/perf/arch/riscv/util/riscv_exception_types.h
> new file mode 100644
> index 000000000000..c49b8fa5e847
> --- /dev/null
> +++ b/tools/perf/arch/riscv/util/riscv_exception_types.h
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0
> +#ifndef ARCH_PERF_RISCV_EXCEPTION_TYPES_H
> +#define ARCH_PERF_RISCV_EXCEPTION_TYPES_H
> +
> +#define EXC_INST_MISALIGNED 0
> +#define EXC_INST_ACCESS 1
> +#define EXC_INST_ILLEGAL 2
> +#define EXC_BREAKPOINT 3
> +#define EXC_LOAD_MISALIGNED 4
> +#define EXC_LOAD_ACCESS 5
> +#define EXC_STORE_MISALIGNED 6
> +#define EXC_STORE_ACCESS 7
> +#define EXC_SYSCALL 8
> +#define EXC_HYPERVISOR_SYSCALL 9
> +#define EXC_SUPERVISOR_SYSCALL 10
> +#define EXC_INST_PAGE_FAULT 12
> +#define EXC_LOAD_PAGE_FAULT 13
> +#define EXC_STORE_PAGE_FAULT 15
> +#define EXC_INST_GUEST_PAGE_FAULT 20
> +#define EXC_LOAD_GUEST_PAGE_FAULT 21
> +#define EXC_VIRTUAL_INST_FAULT 22
> +#define EXC_STORE_GUEST_PAGE_FAULT 23
> +
> +#define EXC(x) {EXC_##x, #x }
> +
> +#define kvm_riscv_exception_class \
> + EXC(INST_MISALIGNED), EXC(INST_ACCESS), EXC(INST_ILLEGAL), \
> + EXC(BREAKPOINT), EXC(LOAD_MISALIGNED), EXC(LOAD_ACCESS), \
> + EXC(STORE_MISALIGNED), EXC(STORE_ACCESS), EXC(SYSCALL), \
> + EXC(HYPERVISOR_SYSCALL), EXC(SUPERVISOR_SYSCALL), \
> + EXC(INST_PAGE_FAULT), EXC(LOAD_PAGE_FAULT), EXC(STORE_PAGE_FAULT), \
> + EXC(INST_GUEST_PAGE_FAULT), EXC(LOAD_GUEST_PAGE_FAULT), \
> + EXC(VIRTUAL_INST_FAULT), EXC(STORE_GUEST_PAGE_FAULT)
> +
> +#endif /* ARCH_PERF_RISCV_EXCEPTION_TYPES_H */
For some reason my previous RB email doesn't show up in lore. So here it
goes agian. Sorry for the spam it gets delivered twice.
Reviewed-by: Atish Patra <atishp@rivosinc.com>
next prev parent reply other threads:[~2024-05-04 0:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 8:08 [PATCH v3 0/2] perf kvm: Add kvm stat support on riscv Shenlin Liang
2024-04-22 8:08 ` [PATCH v3 1/2] RISCV: KVM: add tracepoints for entry and exit events Shenlin Liang
2024-04-22 8:08 ` [PATCH v3 2/2] perf kvm/riscv: Port perf kvm stat to RISC-V Shenlin Liang
2024-05-04 0:25 ` Atish Patra [this message]
2024-04-29 6:13 ` [PATCH v3 0/2] perf kvm: Add kvm stat support on riscv Shenlin Liang
2024-04-29 18:50 ` Arnaldo Carvalho de Melo
2024-05-04 0:21 ` Atish Patra
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