From: "Clément Léger" <cleger@rivosinc.com>
To: Deepak Gupta <debug@rivosinc.com>
Cc: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, Ved Shanbhogue <ved@rivosinc.com>
Subject: Re: [RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception
Date: Tue, 30 Apr 2024 17:35:36 +0200 [thread overview]
Message-ID: <b4228cda-b072-479d-bce0-3af42ce49811@rivosinc.com> (raw)
In-Reply-To: <ZixV3lCe3jYQN3Qx@debug.ba.rivosinc.com>
On 27/04/2024 03:33, Deepak Gupta wrote:
>> /**
>> * kvm_riscv_vcpu_trap_redirect -- Redirect trap to Guest
>> *
>> * @vcpu: The VCPU pointer
>> * @trap: Trap details
>> */
>> -void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu,
>> - struct kvm_cpu_trap *trap)
>> +int kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu,
>> + struct kvm_cpu_trap *trap)
>> {
>> unsigned long vsstatus = csr_read(CSR_VSSTATUS);
>>
>> + if (riscv_isa_extension_available(vcpu->arch.isa, SSDBLTRP)) {
>> + if (vsstatus & SR_SDT)
>> + return kvm_riscv_double_trap(vcpu, trap);
>> +
>> + /* Set Double Trap bit to enable double trap detection */
>> + vsstatus |= SR_SDT;
>
> I didn't get it.
> Why do this without checking if current config allows us to do so ?
> I am imagining we do this only when henvcfg for current vcpu says that
> DTE=1
> for this this guest, right?
We actually do not really care since if not enabled, this bit will be
masked by the hardware when writing it to the CSR. I could indeed add a
check for that but in the end, it will yield the same result. In that
case, just ORing it with the value seems more efficient than adding an
"if" to check if the extension and DTE is enabled.
Clément
next prev parent reply other threads:[~2024-04-30 15:35 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-18 14:26 [RFC PATCH 0/7] riscv: Add support for Ssdbltrp extension Clément Léger
2024-04-18 14:26 ` [RFC PATCH 1/7] riscv: kvm: add support for FWFT SBI extension Clément Léger
2024-04-26 23:44 ` Deepak Gupta
2024-04-30 7:26 ` Clément Léger
2024-04-18 14:26 ` [RFC PATCH 2/7] dt-bindings: riscv: add Ssdbltrp ISA extension description Clément Léger
2024-04-23 16:30 ` Conor Dooley
2024-04-24 7:20 ` Clément Léger
2024-04-24 7:40 ` Conor Dooley
2024-04-24 21:38 ` Ved Shanbhogue
2024-04-18 14:26 ` [RFC PATCH 3/7] riscv: add Ssdbltrp ISA extension parsing Clément Léger
2024-04-18 14:26 ` [RFC PATCH 4/7] riscv: handle Ssdbltrp mstatus SDT bit Clément Léger
2024-04-18 14:26 ` [RFC PATCH 5/7] riscv: add double trap driver Clément Léger
2024-04-23 16:39 ` Conor Dooley
2024-04-24 8:56 ` Clément Léger
2024-04-26 23:59 ` Deepak Gupta
2024-05-14 8:06 ` Clément Léger
2024-05-14 14:38 ` Deepak Gupta
2024-04-18 14:26 ` [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE Clément Léger
2024-04-27 1:17 ` Deepak Gupta
2024-04-27 15:36 ` Deepak Gupta
2024-05-14 9:43 ` Clément Léger
2024-05-14 16:05 ` Deepak Gupta
2024-04-18 14:26 ` [RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception Clément Léger
2024-04-27 1:33 ` Deepak Gupta
2024-04-30 15:35 ` Clément Léger [this message]
2024-04-23 16:24 ` [RFC PATCH 0/7] riscv: Add support for Ssdbltrp extension Conor Dooley
2024-04-24 7:23 ` Clément Léger
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