From: Yao Yuan <yuan.yao@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Xu" <peterx@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>
Cc: kvm@vger.kernel.org, yuan.yao@linux.intel.com, yuan.yao@intel.com
Subject: [kvm-unit-tests PATCH 1/1] x86/apic: Fix test_apic_timer_one_shot() random failure
Date: Sun, 28 Apr 2024 10:29:06 +0800 [thread overview]
Message-ID: <20240428022906.373130-1-yuan.yao@intel.com> (raw)
Explicitly clear TMICT to avoid test_apic_timer_one_shot()
negative failure.
Clear TMICT to disable any enabled but masked local timer.
Otherwise timer interrupt may occur after lvtt_handler() is
set as handler and **before** TDCR or TIMCT is set to new
value, lead this test failure. Log comes from UEFI mode:
PASS: PV IPIs testing
PASS: pending nmi
Got local timer intr before write to TDCR / TMICT
old tmict:0x989680 old lvtt:0x30020 tsc2 - tsc1 = 0xb68
^^^^^^^^ ^^^^^^^
FAIL: APIC LVT timer one shot
Fixes: 9f815b293961 ("x86: apic: add LVT timer test")
Signed-off-by: Yao Yuan <yuan.yao@intel.com>
---
x86/apic.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/x86/apic.c b/x86/apic.c
index dd7e7834..2052e864 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -480,6 +480,13 @@ static void test_apic_timer_one_shot(void)
uint64_t tsc1, tsc2;
static const uint32_t interval = 0x10000;
+ /*
+ * clear TMICT to disable any enabled but masked local timer.
+ * Otherwise timer interrupt may occur after lvtt_handler() is
+ * set as handler and **before** TDCR or TIMCT is set to new value,
+ * lead this test failure.
+ */
+ apic_write(APIC_TMICT, 0);
#define APIC_LVT_TIMER_VECTOR (0xee)
handle_irq(APIC_LVT_TIMER_VECTOR, lvtt_handler);
base-commit: 9cab58249f98adc451933530fd7e618e1856eb94
--
2.27.0
next reply other threads:[~2024-04-28 2:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-28 2:29 Yao Yuan [this message]
2024-04-29 7:40 ` [kvm-unit-tests PATCH 1/1] x86/apic: Fix test_apic_timer_one_shot() random failure Xiaoyao Li
2024-04-29 8:23 ` Yuan Yao
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