From: Dan Carpenter <dan.carpenter@linaro.org>
To: matthew.brost@intel.com
Cc: intel-xe@lists.freedesktop.org
Subject: [bug report] drm/xe: Introduce a new DRM driver for Intel GPUs
Date: Tue, 7 May 2024 17:53:40 +0300 [thread overview]
Message-ID: <dfab90f9-0989-4652-9854-91a00a7d90c1@moroto.mountain> (raw)
Hello Matthew Brost,
Commit dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel
GPUs") from Mar 30, 2023 (linux-next), leads to the following Smatch
static checker warning:
drivers/gpu/drm/xe/xe_hw_engine.c:611 read_media_fuses()
warn: was expecting a 64 bit value instead of '((((1))) << i)'
drivers/gpu/drm/xe/xe_hw_engine.c
582 static void read_media_fuses(struct xe_gt *gt)
583 {
584 struct xe_device *xe = gt_to_xe(gt);
585 u32 media_fuse;
586 u16 vdbox_mask;
587 u16 vebox_mask;
588 int i, j;
589
590 xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
591
592 media_fuse = xe_mmio_read32(gt, GT_VEBOX_VDBOX_DISABLE);
593
594 /*
595 * Pre-Xe_HP platforms had register bits representing absent engines,
596 * whereas Xe_HP and beyond have bits representing present engines.
597 * Invert the polarity on old platforms so that we can use common
598 * handling below.
599 */
600 if (GRAPHICS_VERx100(xe) < 1250)
601 media_fuse = ~media_fuse;
602
603 vdbox_mask = REG_FIELD_GET(GT_VDBOX_DISABLE_MASK, media_fuse);
604 vebox_mask = REG_FIELD_GET(GT_VEBOX_DISABLE_MASK, media_fuse);
605
606 for (i = XE_HW_ENGINE_VCS0, j = 0; i <= XE_HW_ENGINE_VCS7; ++i, ++j) {
607 if (!(gt->info.engine_mask & BIT(i)))
608 continue;
609
610 if (!(BIT(j) & vdbox_mask)) {
--> 611 gt->info.engine_mask &= ~BIT(i);
This would only be an issue on 32bit builds... The ->engine_mask is a
u64 but BIT() is unsigned long (32 bit in this case). So this clears
out the top 32 bits.
I think that we don't actually need 64 flags, so we could just make
gt->info.engine_mask a u32.
612 drm_info(&xe->drm, "vcs%u fused off\n", j);
613 }
614 }
615
616 for (i = XE_HW_ENGINE_VECS0, j = 0; i <= XE_HW_ENGINE_VECS3; ++i, ++j) {
617 if (!(gt->info.engine_mask & BIT(i)))
618 continue;
619
620 if (!(BIT(j) & vebox_mask)) {
621 gt->info.engine_mask &= ~BIT(i);
622 drm_info(&xe->drm, "vecs%u fused off\n", j);
623 }
624 }
625 }
regards,
dan carpenter
next reply other threads:[~2024-05-07 14:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 14:53 Dan Carpenter [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-06-08 14:23 [bug report] drm/xe: Introduce a new DRM driver for Intel GPUs Dan Carpenter
2024-01-05 12:22 Dan Carpenter
2024-01-04 10:41 Dan Carpenter
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