From: Tejas Upadhyay <tejas.upadhyay@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>,
Tejas Upadhyay <tejas.upadhyay@intel.com>
Subject: [PATCH] drm/xe/xe2hpg: Add wa_14021821874
Date: Mon, 29 Apr 2024 11:14:06 +0530 [thread overview]
Message-ID: <20240429054406.2165095-1-tejas.upadhyay@intel.com> (raw)
wa_14021821874 applies to xe2_hpg
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_wa.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 83847f2da72a..7c9d4e55a9cf 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -386,6 +386,7 @@
#define TDL_TSL_CHICKEN XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)
#define SLM_WMTP_RESTORE REG_BIT(11)
+#define STK_ID_RESTRICT REG_BIT(12)
#define ROW_CHICKEN XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)
#define UGM_BACKUP_MODE REG_BIT(13)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 9d9b7fa7a8f0..f030dbb1b89e 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -538,6 +538,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS))
},
+ { XE_RTP_NAME("14021821874"),
+ XE_RTP_RULES(GRAPHICS_VERSION(2001), FUNC(xe_rtp_match_first_render_or_compute)),
+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
+ },
/* Xe2_HPM */
--
2.25.1
next reply other threads:[~2024-04-29 5:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-29 5:44 Tejas Upadhyay [this message]
2024-04-29 5:35 ` ✓ CI.Patch_applied: success for drm/xe/xe2hpg: Add wa_14021821874 Patchwork
2024-04-29 5:35 ` ✓ CI.checkpatch: " Patchwork
2024-04-29 5:36 ` ✓ CI.KUnit: " Patchwork
2024-04-29 5:50 ` [PATCH] " Ghimiray, Himal Prasad
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