From: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
To: ross.lagerwall@citrix.com
Cc: intel-wired-lan@lists.osuosl.org, pmenzel@molgen.mpg.de,
javi.merino@kernel.org, anthony.l.nguyen@intel.com,
netdev@vger.kernel.org
Subject: Re: [Intel-wired-lan] [PATCH v2] ice: Fix enabling SR-IOV with Xen
Date: Wed, 8 May 2024 11:23:21 +0200 [thread overview]
Message-ID: <20240508092321.83776-1-sergey.temerkhanov@intel.com> (raw)
In-Reply-To: <CAG7k0ErF+e2vMUYRuh2EBjWmE7iqdOMS1CQv-7r18T1mVbK1aA@mail.gmail.com>
This patch makes sense since VFs need to be assigned resources (especially MSI-X interrupt count)
before making these VFs visible, so that the kernel PCI enumeration code reads correct MSI-X
interrupt count for the VFs.
Regards,
Sergey
next prev parent reply other threads:[~2024-05-08 15:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-29 12:49 [Intel-wired-lan] [PATCH v2] ice: Fix enabling SR-IOV with Xen Ross Lagerwall
2024-04-29 13:04 ` Paul Menzel
2024-04-30 9:03 ` Ross Lagerwall
2024-05-08 9:23 ` Sergey Temerkhanov [this message]
2024-05-06 21:27 ` Tony Nguyen
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