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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 31/35] drm/i915/bios: Define VBT block 57 (Vswing PreEmphasis Table) contents
Date: Mon, 6 May 2024 14:47:15 +0300	[thread overview]
Message-ID: <ZjjDQ9r675jsaXzY@intel.com> (raw)
In-Reply-To: <87ikzrmg44.fsf@intel.com>

On Mon, May 06, 2024 at 12:42:03PM +0300, Jani Nikula wrote:
> On Fri, 03 May 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Define the contents of VBT block 57 (Vswing PreEmphasis Table).
> >
> > The contents is highly platform specific. The columns of the
> > table corresponding to some set of PHY/etc registers. The rows
> > corresponding to all legal vswing+pre-emphasis combinations
> > (ie. should be 10 rows in each table). And each table
> > corresponds to a platform specific (mostly undocumented)
> > mapping based on link rate/eDP low-vswing/etc. parameters.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I guess we should use this... but I'm not sure how.

Yeah. Based on he bug report there are at least some 
ICL machines that need this.

My rough idea is:
1. change our buf_trans structs to match this (ie. make
   everything u32 basically), and get the column->register
   mapping from the Windows code to make sure the struct
   members are in the correct order. Sadly none of this 
   is docuemnted in the VBT spec
2. also snoop the rules for selecting the correct table 
   from the Windows code, since that too is undocumented.
   I think there is some kind of note about this for ICL
   specifically, but even that might have been outdated
3. point at the correct VBT provided table rather than
   an in kernel table when appropriate

But I think there are some additional complications due to
mg/dkl vs. combo PHY as well. So probably not 100% trivial.

I don't totally like step 1 of that plan as it'll increase
the size of the in kernel buf_trans tables needlessly. But
the alternative would involve converting the VBT layout
into our layout as needed, which is perhaps a bit less
straightforward. Dunno.

> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > index 50d0d96fca67..0e5a2bf429f4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > @@ -184,6 +184,7 @@ enum bdb_block_id {
> >  	BDB_MIPI_SEQUENCE		= 53, /* 177+ */
> >  	BDB_RGB_PALETTE			= 54, /* 180+ */
> >  	BDB_COMPRESSION_PARAMETERS	= 56, /* 213+ */
> > +	BDB_VSWING_PREEMPH		= 57, /* 218+ */
> >  	BDB_GENERIC_DTD			= 58, /* 229+ */
> >  	BDB_SKIP			= 254, /* VBIOS only */
> >  };
> > @@ -1486,6 +1487,16 @@ struct bdb_compression_parameters {
> >  	struct dsc_compression_parameters_entry data[16];
> >  } __packed;
> >  
> > +/*
> > + * Block 57 -  Vswing PreEmphasis Table
> > + */
> > +
> > +struct bdb_vswing_preemph {
> > +	u8 num_tables;
> > +	u8 num_columns;
> > +	u32 tables[];
> > +} __packed;
> > +
> >  /*
> >   * Block 58 - Generic DTD Block
> >   */
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2024-05-06 11:47 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-03 12:24 [PATCH 00/35] drm/i915/bios: Define (almost) all BDB blocks Ville Syrjala
2024-05-03 12:24 ` [PATCH 01/35] drm/i915/bios: Define eDP DSC disable bit Ville Syrjala
2024-05-06  9:10   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 02/35] drm/i915/bios: Remove version number comment from DEVICE_HANDLE_EFP4 Ville Syrjala
2024-05-03 12:24 ` [PATCH 03/35] drm/i915/bios: Indicate which VBT structures are based on EDID Ville Syrjala
2024-05-06  9:14   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 04/35] drm/i915/bios: Get rid of "LVDS" from all LFP data stuff Ville Syrjala
2024-05-06  9:19   ` Jani Nikula
2024-05-06 11:32     ` Ville Syrjälä
2024-05-03 12:24 ` [PATCH 05/35] drm/i915/bios: Rename SDVO DTD blocks a bit Ville Syrjala
2024-05-03 12:24 ` [PATCH 06/35] drm/i915/bios: Define "TV" child device handle Ville Syrjala
2024-05-03 12:24 ` [PATCH 07/35] drm/i915/bios: Flag "VBIOS only" VBT data blocks Ville Syrjala
2024-05-03 12:24 ` [PATCH 08/35] drm/i915/bios: Add version notes for some blocks Ville Syrjala
2024-05-06  9:23   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 09/35] drm/i915/bios: Define VBT block 3 (Display Toggle Option) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 10/35] drm/i915/bios: Define VBT block 4 (Mode Support List) contents Ville Syrjala
2024-05-06  9:24   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 11/35] drm/i915/bios: Define VBT block 5 (Generic Mode Table) Ville Syrjala
2024-05-03 12:24 ` [PATCH 12/35] drm/i915/bios: Define VBT blocks 6, 7, 8 (register tables) contents Ville Syrjala
2024-05-06  9:27   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 13/35] drm/i915/bios: Define VBT block 10 (Mode Removal Table) contents Ville Syrjala
2024-05-06  9:28   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 14/35] drm/i915/bios: Define VBT block 12 (Driver Persistent Algorithm) contents Ville Syrjala
2024-05-06  9:29   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 15/35] drm/i915/bios: Define VBT block 15 (Dot Clock Override Table) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 16/35] drm/i915/bios: Define ALM only VBT block 9 contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 17/35] drm/i915/bios: Define VBT block 17 (SV Test Functions) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 18/35] drm/i915/bios: Define VBT block 18 (Driver Rotation) contents Ville Syrjala
2024-05-06  9:31   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 19/35] drm/i915/bios: Define VBT blocks 16, 29, 31 (Toggle List) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 20/35] drm/i915/bios: Define VBT blocks 19, 30, 32 (Display Configuration Removal Table) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 21/35] drm/i915/bios: Define VBT block 20 (OEM Customizable Modes) contents Ville Syrjala
2024-05-06  9:35   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 22/35] drm/i915/bios: Define VBT block 21 (EFP List) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 23/35] drm/i915/bios: Define VBT block 24 (SDVO LVDS PnP ID) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 24/35] drm/i915/bios: Define VBT block 25 (SDVO LVDS PPS) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 25/35] drm/i915/bios: Define VBT block 26 (TV Options) contents Ville Syrjala
2024-05-06  9:36   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 26/35] drm/i915/bios: Define VBT block 28 (EFP DTD) contents Ville Syrjala
2024-05-06  9:37   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 27/35] drm/i915/bios: Define VBT block 45 (eDP BFI) contents Ville Syrjala
2024-05-03 12:24 ` [PATCH 28/35] drm/i915/bios: Define VBT block 46 (Chromaticity For Narrow Gamut Panel) contents Ville Syrjala
2024-05-06  9:39   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 29/35] drm/i915/bios: Define VBT block 51 (Fixed Set Mode Table) contents Ville Syrjala
2024-05-06  9:40   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 30/35] drm/i915/bios: Define VBT block 55 (RGB Palette " Ville Syrjala
2024-05-06  9:40   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 31/35] drm/i915/bios: Define VBT block 57 (Vswing PreEmphasis " Ville Syrjala
2024-05-06  9:42   ` Jani Nikula
2024-05-06 11:47     ` Ville Syrjälä [this message]
2024-05-03 12:24 ` [PATCH 32/35] drm/i915/bios: Define VBT block 50 (MIPI) contents Ville Syrjala
2024-05-06  9:44   ` Jani Nikula
2024-05-03 12:24 ` [PATCH 33/35] drm/i915/bios: Define VBT block 55 (Compression Parameters) Ville Syrjala
2024-05-03 12:24 ` [PATCH 34/35] drm/i915/bios: Define VBT block 252 (int15 Hook) Ville Syrjala
2024-05-03 12:24 ` [PATCH 35/35] drm/i915/bios: Define VBT block 253 (PRD Table) contents Ville Syrjala
2024-05-06  9:45   ` Jani Nikula
2024-05-03 13:05 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: Define (almost) all BDB blocks Patchwork
2024-05-03 13:05 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-03 13:13 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-04  2:02 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-06  9:47 ` [PATCH 00/35] " Jani Nikula

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