Intel-GFX Archive mirror
 help / color / mirror / Atom feed
 messages from 2021-05-13 11:59:27 to 2021-05-15 12:02:41 UTC [more...]

[Intel-gfx] [PATCH v2 00/40] Use ASCII subset instead of UTF-8 alternate symbols
 2021-05-15 12:02 UTC  (9+ messages)

[Intel-gfx] [PATCH 0/5] Rename all CSR references to DMC
 2021-05-15 11:43 UTC  (11+ messages)
` [Intel-gfx] [PATCH 1/5] drm/i915/dmc: s/intel_csr/intel_dmc
` [Intel-gfx] [PATCH 2/5] drm/i915/dmc: s/HAS_CSR/HAS_DMC
` [Intel-gfx] [PATCH 3/5] drm/i915/dmc: Rename macro names containing csr
` [Intel-gfx] [PATCH 4/5] drm/i915/dmc: Rename functions names having "csr"
` [Intel-gfx] [PATCH 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename all CSR references to DMC (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v4 00/23] Alder Lake-P Support
 2021-05-15  5:22 UTC  (27+ messages)
` [Intel-gfx] [PATCH v4 01/23] drm/i915/xelpd: Enhanced pipe underrun reporting
` [Intel-gfx] [PATCH v4 02/23] drm/i915/xelpd: Support DP1.4 compression BPPs
` [Intel-gfx] [PATCH v4 03/23] drm/i915/xelpd: Calculate VDSC RC parameters
` [Intel-gfx] [PATCH v4 04/23] drm/i915/xelpd: Add rc_qp_table for rcparams calculation
` [Intel-gfx] [PATCH v4 05/23] drm/i915/xelpd: Add VRR guardband for VRR CTL
` [Intel-gfx] [PATCH v4 06/23] drm/i915/adl_p: Add dedicated SAGV watermarks
` [Intel-gfx] [PATCH v4 07/23] drm/i915/adl_p: Setup ports/phys
` [Intel-gfx] [PATCH v4 08/23] drm/i915/adl_p: Handle TC cold
` [Intel-gfx] [PATCH v4 09/23] drm/i915/adl_p: Implement TC sequences
` [Intel-gfx] [PATCH v4 10/23] drm/i915/adl_p: Don't config MBUS and DBUF during display initialization
` [Intel-gfx] [PATCH v4 11/23] drm/i915/adl_p: Add ddb allocation support
` [Intel-gfx] [PATCH v4 12/23] drm/i915: Introduce MBUS relative dbuf offsets
` [Intel-gfx] [PATCH v4 13/23] drm/i915/adl_p: MBUS programming
` [Intel-gfx] [PATCH v4 14/23] drm/i915/adl_p: Tx escape clock with DSI
` [Intel-gfx] [PATCH v4 15/23] drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr struct
` [Intel-gfx] [PATCH v4 16/23] drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()
` [Intel-gfx] [PATCH v4 17/23] drm/i915/display: Add PSR interrupt error check function
` [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Introduce new intel_psr_pause/resume function
` [Intel-gfx] [PATCH v4 19/23] drm/i915/adl_p: Define and use ADL-P specific DP translation tables
` [Intel-gfx] [PATCH v4 20/23] drm/i915/adl_p: Add PLL Support
` [Intel-gfx] [PATCH v4 21/23] drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
` [Intel-gfx] [PATCH v4 22/23] drm/i915/adlp: Add PIPE_MISC2 programming
` [Intel-gfx] [PATCH v4 23/23] drm/i915/adl_p: Update memory bandwidth parameters
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alder Lake-P Support (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v6 0/9] drm: Extract DPCD backlight helpers from i915, add support in nouveau
 2021-05-15  4:09 UTC  (14+ messages)
` [Intel-gfx] [PATCH v6 1/9] drm/i915/dpcd_bl: Remove redundant AUX backlight frequency calculations
` [Intel-gfx] [PATCH v6 2/9] drm/i915/dpcd_bl: Handle drm_dpcd_read/write() return values correctly
` [Intel-gfx] [PATCH v6 3/9] drm/i915/dpcd_bl: Cleanup intel_dp_aux_vesa_enable_backlight() a bit
` [Intel-gfx] [PATCH v6 4/9] drm/i915/dpcd_bl: Cache some backlight capabilities in intel_panel.backlight
` [Intel-gfx] [PATCH v6 5/9] drm/i915/dpcd_bl: Move VESA backlight enabling code closer together
` [Intel-gfx] [PATCH v6 6/9] drm/i915/dpcd_bl: Return early in vesa_calc_max_backlight if we can't read PWMGEN_BIT_COUNT
` [Intel-gfx] [PATCH v6 7/9] drm/i915/dpcd_bl: Print return codes for VESA backlight failures
` [Intel-gfx] [PATCH v6 8/9] drm/dp: Extract i915's eDP backlight code into DRM helpers
` [Intel-gfx] [PATCH v6 9/9] drm/nouveau/kms/nv50-: Add basic DPCD backlight support for nouveau
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau (rev8)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI 00/19] Another batch of reviewed XeLPD / ADL-P patches
 2021-05-15  3:00 UTC  (25+ messages)
` [Intel-gfx] [CI 01/19] drm/i915/xelpd: Handle new location of outputs D and E
` [Intel-gfx] [CI 02/19] drm/i915/xelpd: Increase maximum watermark lines to 255
` [Intel-gfx] [CI 03/19] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
` [Intel-gfx] [CI 04/19] drm/i915/xelpd: Support DP1.4 compression BPPs
` [Intel-gfx] [CI 05/19] drm/i915: Get slice height before computing rc params
` [Intel-gfx] [CI 06/19] drm/i915/xelpd: Provide port/phy mapping for vbt
` [Intel-gfx] [CI 07/19] drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines
` [Intel-gfx] [CI 08/19] drm/i915/adl_p: Add cdclk support for ADL-P
` [Intel-gfx] [CI 09/19] drm/i915/display/tc: Rename safe_mode functions ownership
` [Intel-gfx] [CI 10/19] drm/i915/adl_p: Enable modular fia
` [Intel-gfx] [CI 11/19] drm/i915: Move intel_modeset_all_pipes()
` [Intel-gfx] [CI 12/19] drm/i915/adl_p: Enable/disable loadgen sharing
` [Intel-gfx] [CI 13/19] drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner
` [Intel-gfx] [CI 14/19] drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoiner
` [Intel-gfx] [CI 15/19] drm/i915/bigjoiner: atomic commit changes for uncompressed joiner
` [Intel-gfx] [CI 16/19] drm/i915/adl_p: Add IPs stepping mapping
` [Intel-gfx] [CI 17/19] drm/i915/adl_p: Implement Wa_22011091694
` [Intel-gfx] [CI 18/19] drm/i915/display/adl_p: Implement Wa_22011320316
` [Intel-gfx] [CI 19/19] drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Another batch of reviewed XeLPD / ADL-P patches
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v3 0/1] drm/i915/dg1: Add HWMON power support
 2021-05-15  1:50 UTC  (4+ messages)
` [Intel-gfx] [PATCH v3 1/1] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v2 1/4] drm/i915/display: Fix fastsets involving PSR
 2021-05-15  1:09 UTC  (10+ messages)
` [Intel-gfx] [PATCH v2 2/4] drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR enabled
` [Intel-gfx] [PATCH v2 3/4] drm/i915/display: Nuke has_infoframe
` [Intel-gfx] [PATCH v2 4/4] drm/i915/display: Drop FIXME about turn off infoframes
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915/display: Fix fastsets involving PSR
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915/display: Fix fastsets involving PSR (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
 2021-05-15  0:23 UTC  (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v1 0/1] drm/i915/dg1: Add HWMON power sensor support
 2021-05-14 23:40 UTC  (4+ messages)
` [Intel-gfx] [PATCH v2 1/1] "

[Intel-gfx] [PATCH 1/4] drm/i915/display: Nuke has_infoframe
 2021-05-14 23:21 UTC  (8+ messages)
` [Intel-gfx] [PATCH 2/4] drm/i915/display: Replace intel_dp_set_infoframes() disable calls by dig_port->set_infoframes()
` [Intel-gfx] [PATCH 3/4] drm/i915/display: Replace intel_dp_set_infoframes() enable "
` [Intel-gfx] [PATCH 4/4] drm/i915/display: Fix fastsets involving PSR
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/display: Nuke has_infoframe
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 00/14] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
 2021-05-14 22:44 UTC  (18+ messages)
` [Intel-gfx] [PATCH 01/14] drm/i915: s/crtc_state/new_crtc_state/ etc
` [Intel-gfx] [PATCH 02/14] drm/i915: Fix g4x cxsr enable condition
` [Intel-gfx] [PATCH 03/14] drm/i915: Use u8 consistently for active_planes bitmask
` [Intel-gfx] [PATCH 04/14] drm/i915: Apply WaUse32BppForSRWM to elk as well as ctg
` [Intel-gfx] [PATCH 05/14] drm/i915: Fix HPLL watermark readout for g4x
` [Intel-gfx] [PATCH 06/14] drm/i915: Split g4x_compute_pipe_wm() into two
` [Intel-gfx] [PATCH 07/14] drm/i915: Split vlv_compute_pipe_wm() "
` [Intel-gfx] [PATCH 08/14] drm/i915: Simplify up g4x watermark sanitation
` [Intel-gfx] [PATCH 09/14] drm/i915: Simplify up vlv "
` [Intel-gfx] [PATCH 10/14] drm/i915: Add missing invalidate to g4x wm readout
` [Intel-gfx] [PATCH 11/14] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
` [Intel-gfx] [PATCH 12/14] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
` [Intel-gfx] [PATCH 13/14] drm/i915: Write watermarks for disabled pipes "
` [Intel-gfx] [PATCH 14/14] drm/i915: Enable atomic by default on ctg/elk
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm: Only select I2C_ALGOBIT for drivers that actually need it
 2021-05-14 20:26 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [RFC PATCH 0/5] GuC submission / DRM scheduler integration plan + new uAPI
 2021-05-14 20:05 UTC  (6+ messages)
` [Intel-gfx] [RFC PATCH 4/5] drm/i915: Introduce 'set parallel submit' extension

[Intel-gfx] [PATCH 00/27] drm/i915/gem: ioctl clean-ups (v5)
 2021-05-14 19:13 UTC  (16+ messages)
` [Intel-gfx] [PATCH 02/27] drm/i915: Stop storing the ring size in the ring pointer
` [Intel-gfx] [PATCH 06/27] drm/i915: Drop the CONTEXT_CLONE API
` [Intel-gfx] [PATCH 10/27] drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT
` [Intel-gfx] [PATCH 17/27] drm/i915/gem: Rework error handling in default_engines
` [Intel-gfx] [PATCH 19/27] drm/i915/gem: Use the proto-context to handle create parameters

[Intel-gfx] [PATCH 0/6] drm/i915: Check HDMI sink deep color capabilities during .mode_valid()
 2021-05-14 17:44 UTC  (15+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915: Extract intel_hdmi_bpc_possible()
` [Intel-gfx] [PATCH 2/6] drm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible()
` [Intel-gfx] [PATCH 3/6] drm/i915: Move platform checks "
` [Intel-gfx] [PATCH 4/6] drm/i915: Check sink deep color capabilitis during HDMI .mode_valid()
` [Intel-gfx] [PATCH 5/6] drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()
` [Intel-gfx] [PATCH 6/6] drm/i915: Drop redundant has_hdmi_sink check

[Intel-gfx] [PATCH 0/3] drm/i915: split out new intel_backlight.[ch]
 2021-05-14 17:20 UTC  (3+ messages)
` [Intel-gfx] [PATCH 3/3] drm/i915/panel: mass rename functions to have intel_panel_ prefix

[Intel-gfx] [RFC PATCH 00/97] Basic GuC submission support in the i915
 2021-05-14 16:46 UTC  (14+ messages)

[Intel-gfx] [PATCH 0/7] Per client engine busyness
 2021-05-14 15:10 UTC  (14+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v3 00/48] Alder Lake-P Support
 2021-05-14 13:52 UTC  (21+ messages)
` [Intel-gfx] [PATCH v3 04/48] drm/i915/xelpd: Handle new location of outputs D and E
` [Intel-gfx] [PATCH v3 10/48] drm/i915/xelpd: Support DP1.4 compression BPPs
` [Intel-gfx] [PATCH v3 11/48] drm/i915: Get slice height before computing rc params
` [Intel-gfx] [PATCH v3 20/48] drm/i915/adl_p: Add cdclk support for ADL-P
` [Intel-gfx] [PATCH v3 29/48] drm/i915/adl_p: MBUS programming
` [Intel-gfx] [PATCH v3 39/48] drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner
` [Intel-gfx] [PATCH v3 40/48] drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoiner
` [Intel-gfx] [PATCH v3 41/48] drm/i915/bigjoiner: atomic commit changes for uncompressed joiner
` [Intel-gfx] [PATCH v3 45/48] drm/i915/adl_p: Implement Wa_22011091694
` [Intel-gfx] [PATCH v3 46/48] drm/i915/display/adl_p: Implement Wa_22011320316

[Intel-gfx] [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled
 2021-05-14 13:41 UTC  (7+ messages)

[Intel-gfx] [PATCH v2] drm/i915/gem: Pin the L-shape quirked object as unshrinkable
 2021-05-14 13:20 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] thinkpad x1 carbon display flickering after update to 5.12. good on 5.11.x (i915)
 2021-05-14 12:34 UTC 

[Intel-gfx] linux-next: manual merge of the drm-intel tree with the drm tree
 2021-05-14 12:14 UTC  (5+ messages)

[Intel-gfx] [PATCH v3] drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops
 2021-05-14  9:38 UTC  (3+ messages)

[Intel-gfx] [PATCH 0/3] Fix I915_GVT dependency
 2021-05-14  7:08 UTC  (5+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915/gvt: Move mdev attribute groups into kvmgt module

[Intel-gfx] [PULL] drm-intel-fixes
 2021-05-14  6:19 UTC 

[Intel-gfx] [PATCH] drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
 2021-05-13 23:23 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH V2] drm/i915/jsl: Add W/A 1409054076 for JSL
 2021-05-13 20:17 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v2 0/1] drm/dp_mst: Use kHz as link rate units when settig source max link caps at init
 2021-05-13 16:30 UTC  (3+ messages)
` [Intel-gfx] [PATCH v2 1/1] "

[Intel-gfx] [PULL] drm-misc-fixes
 2021-05-13 13:36 UTC 

[Intel-gfx] [PATCH V3 RESEND] drm/i915: Fix "mitigations" parsing if i915 is builtin
 2021-05-13 13:11 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev4)

[Intel-gfx] [PATCH] drm/i915/jsl: Add W/A 1409054076 for JSL
 2021-05-13 12:33 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7
 2021-05-13 12:31 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 (rev2)


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).