From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ville Syrjala" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups
Date: Thu, 16 May 2024 14:36:19 -0000 [thread overview]
Message-ID: <171587017926.2121816.16852783395198666712@8e613ede5ea5> (raw)
In-Reply-To: <20240516135622.3498-1-ville.syrjala@linux.intel.com>
== Series Details ==
Series: drm/i915: Plane register cleanups
URL : https://patchwork.freedesktop.org/series/133701/
State : warning
== Summary ==
Error: dim checkpatch failed
2cd1d3b16e64 drm/i915: Add skl+ plane name aliases to enum plane_id
ad5e92ec05c2 drm/i915: Clean up the cursor register defines
7220bc7c82e0 drm/i915: Add separate define for SEL_FETCH_CUR_CTL()
9477d75d613a drm/i915: Simplify PIPESRC_ERLY_TPT definition
-:54: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#54: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:252:
+#define PIPE_SRCSZ_ERLY_TPT(pipe) _MMIO_PIPE((pipe), _PIPE_SRCSZ_ERLY_TPT_A, _PIPE_SRCSZ_ERLY_TPT_B)
total: 0 errors, 1 warnings, 0 checks, 26 lines checked
bb31d70432ff drm/i915: Rename selective fetch plane registers
d6e1c598110f drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES()
-:90: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#90: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:20:
+#define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \
-:90: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#90: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:20:
+#define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \
+ _PICK_EVEN_2RANGES((plane), PLANE_5, \
+ _PIPE((pipe), (reg_1_a), (reg_1_b)), \
+ _PIPE((pipe), (reg_2_a), (reg_2_b)), \
+ _PIPE((pipe), (reg_5_a), (reg_5_b)), \
+ _PIPE((pipe), (reg_6_a), (reg_6_b)))
-:96: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#96: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:26:
+#define _MMIO_SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_6_b) \
-:117: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#117: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:390:
+ _SEL_FETCH_PLANE_CTL_1_A, _SEL_FETCH_PLANE_CTL_1_B, \
-:118: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#118: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:391:
+ _SEL_FETCH_PLANE_CTL_2_A, _SEL_FETCH_PLANE_CTL_2_B, \
-:119: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#119: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:392:
+ _SEL_FETCH_PLANE_CTL_5_A, _SEL_FETCH_PLANE_CTL_5_B, \
-:120: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#120: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:393:
+ _SEL_FETCH_PLANE_CTL_6_A, _SEL_FETCH_PLANE_CTL_6_B)
-:132: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#132: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:405:
+ _SEL_FETCH_PLANE_POS_1_A, _SEL_FETCH_PLANE_POS_1_B, \
-:133: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#133: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:406:
+ _SEL_FETCH_PLANE_POS_2_A, _SEL_FETCH_PLANE_POS_2_B, \
-:134: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#134: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:407:
+ _SEL_FETCH_PLANE_POS_5_A, _SEL_FETCH_PLANE_POS_5_B, \
-:135: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#135: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:408:
+ _SEL_FETCH_PLANE_POS_6_A, _SEL_FETCH_PLANE_POS_6_B)
-:146: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#146: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:419:
+ _SEL_FETCH_PLANE_POS_1_A, _SEL_FETCH_PLANE_POS_1_B, \
-:147: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#147: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:420:
+ _SEL_FETCH_PLANE_POS_2_A, _SEL_FETCH_PLANE_POS_2_B, \
-:148: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#148: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:421:
+ _SEL_FETCH_PLANE_POS_5_A, _SEL_FETCH_PLANE_POS_5_B, \
-:149: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#149: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:422:
+ _SEL_FETCH_PLANE_POS_6_A, _SEL_FETCH_PLANE_POS_6_B)
-:160: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#160: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:433:
+ _SEL_FETCH_PLANE_POS_1_A, _SEL_FETCH_PLANE_POS_1_B, \
-:161: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#161: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:434:
+ _SEL_FETCH_PLANE_POS_2_A, _SEL_FETCH_PLANE_POS_2_B, \
-:162: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#162: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:435:
+ _SEL_FETCH_PLANE_POS_5_A, _SEL_FETCH_PLANE_POS_5_B, \
-:163: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#163: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:436:
+ _SEL_FETCH_PLANE_POS_6_A, _SEL_FETCH_PLANE_POS_6_B)
total: 0 errors, 18 warnings, 1 checks, 129 lines checked
b2c21e2c199b drm/i915: Add separate defines for cursor WM/DDB register bits
-:62: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#62: FILE: drivers/gpu/drm/i915/display/intel_cursor.c:597:
+ skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
total: 0 errors, 1 warnings, 0 checks, 107 lines checked
4f55aa37ef0c drm/i915: Move PIPEGCMAX to intel_color_regs.h
72bbeba17259 drm/i915: Extract i9xx_plane_regs.h
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#29:
new file mode 100644
-:109: WARNING:LONG_LINE_COMMENT: line length of 116 exceeds 100 columns
#109: FILE: drivers/gpu/drm/i915/display/i9xx_plane_regs.h:76:
+#define DSPGAMC(plane, i) _MMIO_PIPE2(dev_priv, plane, _DSPAGAMC + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */
total: 0 errors, 2 warnings, 0 checks, 278 lines checked
15ddd4a2177e drm/i915: Polish pre-skl primary plane registers
-:89: WARNING:LONG_LINE: line length of 132 exceeds 100 columns
#89: FILE: drivers/gpu/drm/i915/display/i9xx_plane_regs.h:87:
+#define DSPGAMC(plane, i) _MMIO_PIPE2(dev_priv, plane, _DSPAGAMC + (5 - (i)) * 4) /* plane C only, 6 x u0.8 */
total: 0 errors, 1 warnings, 0 checks, 96 lines checked
554bc0f1d34b drm/i915: Document a few pre-skl primary plane platform dependencies
466e7977948e drm/i915: Polish sprite plane register definitions
-:87: WARNING:LONG_LINE_COMMENT: line length of 108 exceeds 100 columns
#87: FILE: drivers/gpu/drm/i915/display/intel_sprite_regs.h:89:
+#define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */
-:303: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#303: FILE: drivers/gpu/drm/i915/display/intel_sprite_regs.h:287:
+#define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL)
-:316: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#316: FILE: drivers/gpu/drm/i915/display/intel_sprite_regs.h:300:
+#define SPKEYMAXVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL)
-:328: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#328: FILE: drivers/gpu/drm/i915/display/intel_sprite_regs.h:312:
+#define SPCONSTALPHA(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)
-:335: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#335: FILE: drivers/gpu/drm/i915/display/intel_sprite_regs.h:319:
+#define SPSURFLIVE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURFLIVE, _SPBSURFLIVE)
total: 0 errors, 5 warnings, 0 checks, 369 lines checked
e4fee9e8867a drm/i915: Document which platforms use which sprite registers
next prev parent reply other threads:[~2024-05-16 14:36 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-16 13:56 [PATCH 00/13] drm/i915: Plane register cleanups Ville Syrjala
2024-05-16 13:56 ` [PATCH 01/13] drm/i915: Add skl+ plane name aliases to enum plane_id Ville Syrjala
2024-05-17 15:33 ` Jani Nikula
2024-05-17 15:55 ` Ville Syrjälä
2024-05-17 17:12 ` [PATCH v2 " Ville Syrjala
2024-05-20 8:56 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 02/13] drm/i915: Clean up the cursor register defines Ville Syrjala
2024-05-20 9:10 ` Jani Nikula
2024-05-20 16:23 ` Ville Syrjälä
2024-05-20 16:34 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 03/13] drm/i915: Add separate define for SEL_FETCH_CUR_CTL() Ville Syrjala
2024-05-20 9:27 ` Jani Nikula
2024-05-20 17:08 ` Ville Syrjälä
2024-05-20 17:14 ` [PATCH v2 " Ville Syrjala
2024-05-16 13:56 ` [PATCH 04/13] drm/i915: Simplify PIPESRC_ERLY_TPT definition Ville Syrjala
2024-05-20 9:35 ` Jani Nikula
2024-05-20 9:37 ` Jani Nikula
2024-05-20 9:56 ` Hogander, Jouni
2024-05-16 13:56 ` [PATCH 05/13] drm/i915: Rename selective fetch plane registers Ville Syrjala
2024-05-20 9:39 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 06/13] drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES() Ville Syrjala
2024-05-23 9:15 ` Jani Nikula
2024-05-23 12:06 ` Ville Syrjälä
2024-05-16 13:56 ` [PATCH 07/13] drm/i915: Add separate defines for cursor WM/DDB register bits Ville Syrjala
2024-05-20 13:24 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 08/13] drm/i915: Move PIPEGCMAX to intel_color_regs.h Ville Syrjala
2024-05-20 13:07 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 09/13] drm/i915: Extract i9xx_plane_regs.h Ville Syrjala
2024-05-20 13:09 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 10/13] drm/i915: Polish pre-skl primary plane registers Ville Syrjala
2024-05-20 13:12 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 11/13] drm/i915: Document a few pre-skl primary plane platform dependencies Ville Syrjala
2024-05-20 13:16 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 12/13] drm/i915: Polish sprite plane register definitions Ville Syrjala
2024-05-20 13:17 ` Jani Nikula
2024-05-20 13:18 ` Jani Nikula
2024-05-16 13:56 ` [PATCH 13/13] drm/i915: Document which platforms use which sprite registers Ville Syrjala
2024-05-20 13:18 ` Jani Nikula
2024-05-16 14:36 ` Patchwork [this message]
2024-05-16 14:36 ` ✗ Fi.CI.SPARSE: warning for drm/i915: Plane register cleanups Patchwork
2024-05-16 18:21 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-05-17 18:07 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups (rev2) Patchwork
2024-05-17 18:08 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-17 18:26 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-18 5:46 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-20 18:08 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanups (rev3) Patchwork
2024-05-20 18:08 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-20 18:20 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-21 5:29 ` ✗ Fi.CI.IGT: failure " Patchwork
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