From: Marcel Ziswiler <marcel@ziswiler.com>
To: linux-phy@lists.infradead.org
Cc: linux-imx@nxp.com, Lucas Stach <l.stach@pengutronix.de>,
linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-kernel@vger.kernel.org,
Marcel Ziswiler <marcel.ziswiler@toradex.com>,
Fabio Estevam <festevam@gmail.com>,
Heiko Stuebner <heiko@sntech.de>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Marc Kleine-Budde <mkl@pengutronix.de>,
Rob Herring <robh@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>,
Tim Harvey <tharvey@gateworks.com>, Vinod Koul <vkoul@kernel.org>,
Yang Li <yang.lee@linux.alibaba.com>,
imx@lists.linux.dev
Subject: [PATCH v1 1/1] phy: freescale: imx8m-pcie: fix pcie link-up instability
Date: Fri, 22 Mar 2024 14:06:32 +0100 [thread overview]
Message-ID: <20240322130646.1016630-2-marcel@ziswiler.com> (raw)
In-Reply-To: <20240322130646.1016630-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Leaving AUX_PLL_REFCLK_SEL at its reset default of AUX_IN (PLL clock)
proves to be more stable on the i.MX 8M Mini.
Fixes: 1aa97b002258 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
index b700f52b7b67..11fcb1867118 100644
--- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
+++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
@@ -110,8 +110,10 @@ static int imx8_pcie_phy_power_on(struct phy *phy)
/* Source clock from SoC internal PLL */
writel(ANA_PLL_CLK_OUT_TO_EXT_IO_SEL,
imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG062);
- writel(AUX_PLL_REFCLK_SEL_SYS_PLL,
- imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063);
+ if (imx8_phy->drvdata->variant != IMX8MM) {
+ writel(AUX_PLL_REFCLK_SEL_SYS_PLL,
+ imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063);
+ }
val = ANA_AUX_RX_TX_SEL_TX | ANA_AUX_TX_TERM;
writel(val | ANA_AUX_RX_TERM_GND_EN,
imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG064);
--
2.44.0
next prev parent reply other threads:[~2024-03-22 13:21 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-22 13:06 [PATCH v1 0/1] phy: freescale: imx8m-pcie: facing pcie link-up instability Marcel Ziswiler
2024-03-22 13:06 ` Marcel Ziswiler [this message]
2024-03-25 3:33 ` [PATCH v1 1/1] phy: freescale: imx8m-pcie: fix " Hongxing Zhu
2024-04-06 6:28 ` Vinod Koul
2024-04-06 6:30 ` Vinod Koul
2024-03-22 16:29 ` [PATCH v1 0/1] phy: freescale: imx8m-pcie: facing " Fabio Estevam
2024-04-06 9:18 ` Vinod Koul
2024-04-07 22:22 ` Marcel Ziswiler
2024-04-12 11:24 ` Vinod Koul
2024-04-15 20:07 ` Marcel Ziswiler
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