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From: Thomas Gleixner <tglx@linutronix.de>
To: speck@linutronix.de
Subject: Re: [PATCH v4 0/8] [PATCH v4] Further reworked KVM patches
Date: Sun, 24 Jun 2018 03:05:22 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.21.1806240257170.8650@nanos.tec.linutronix.de> (raw)
In-Reply-To: <20180623135414.091581758@localhost.localdomain>

On Sat, 23 Jun 2018, speck for konrad.wilk_at_oracle.com wrote:
> Konrad Rzeszutek Wilk (6):
>       x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
>       x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers.
>       x86/KVM/VMX: Add find_msr helper function
>       x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
>       x86/KVM/VMX: Add framework for having disjoint amount of MSRs to save/restore
>       x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required.
> 
> Paolo Bonzini (2):
>       kvm: x86: mitigation for L1 cache terminal fault vulnerabilities
>       x86/KVM: Use L1 cache flush before VMENTER if available.

Our mail server received only 6 out of 9 mails...

   0/8 1/8 3/8 4/8 6/8 8/8 are there.

The rest is stuck somewhere in the intertubes. You need to clean them from
time to time :)

Thanks,

	tglx

  reply	other threads:[~2018-06-24  1:05 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-23 13:54 [MODERATED] [PATCH v4 0/8] [PATCH v4] Further reworked KVM patches konrad.wilk
2018-06-24  1:05 ` Thomas Gleixner [this message]
2018-06-26  2:43 ` [MODERATED] " Konrad Rzeszutek Wilk

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