From: Robert Foss <rfoss@kernel.org>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: "Heiko Stübner" <heiko@sntech.de>,
"Andy Yan" <andy.yan@rock-chips.com>,
"Sandy Huang" <hjc@rock-chips.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Inki Dae" <inki.dae@samsung.com>,
"Seung-Woo Kim" <sw0312.kim@samsung.com>,
"Kyungmin Park" <kyungmin.park@samsung.com>,
"Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org,
linux-rockchip@lists.infradead.org,
dri-devel@lists.freedesktop.org, kernel@pengutronix.de,
patchwork-lst@pengutronix.de
Subject: Re: [PATCH 10/14] drm/bridge: analogix_dp: move macro reset after link bandwidth setting
Date: Tue, 7 May 2024 15:07:51 +0200 [thread overview]
Message-ID: <CAN6tsi4js9jb3Q2tTKLo=3ueCPsQaezZ-FDyzHjJ14D0-Z7ttg@mail.gmail.com> (raw)
In-Reply-To: <20240503151129.3901815-11-l.stach@pengutronix.de>
On Fri, May 3, 2024 at 5:13 PM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Setting the link bandwidth may change the PLL parameters, which will cause
> the PLL to go out of lock, so make sure to apply the MACRO_RST, which
> according to the comment is required to be pulsed after the PLL is locked.
>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> .../gpu/drm/bridge/analogix/analogix_dp_core.c | 18 ++++++++++--------
> 1 file changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index b4a47311cfe8..736b2ed745e1 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -243,6 +243,11 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
>
> /* Set link rate and count as you want to establish*/
> analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
> + /*
> + * MACRO_RST must be applied after the PLL_LOCK to avoid
> + * the DP inter pair skew issue for at least 10 us
> + */
> + analogix_dp_reset_macro(dp);
> analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
>
> /* Setup RX configuration */
> @@ -565,12 +570,6 @@ static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
> int retval = 0;
> bool training_finished = false;
>
> - /*
> - * MACRO_RST must be applied after the PLL_LOCK to avoid
> - * the DP inter pair skew issue for at least 10 us
> - */
> - analogix_dp_reset_macro(dp);
> -
> /* Initialize by reading RX's DPCD */
> analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate);
> analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
> @@ -637,9 +636,12 @@ static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
> u8 link_align, link_status[2];
> enum pll_status status;
>
> - analogix_dp_reset_macro(dp);
> -
> analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
> + /*
> + * MACRO_RST must be applied after the PLL_LOCK to avoid
> + * the DP inter pair skew issue for at least 10 us
> + */
> + analogix_dp_reset_macro(dp);
> analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
> analogix_dp_set_lane_link_training(dp);
>
> --
> 2.39.2
>
This patch does not apply on drm-misc/drm-misc-next as far as I can tell.
next prev parent reply other threads:[~2024-05-07 13:08 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-03 15:11 [PATCH 00/14] improve Analogix DP AUX channel handling Lucas Stach
2024-05-03 15:11 ` [PATCH 01/14] drm/bridge: analogix_dp: remove unused platform power_on_end callback Lucas Stach
2024-05-07 12:02 ` Robert Foss
2024-05-03 15:11 ` [PATCH 02/14] drm/rockchip: analogix_dp: add runtime PM handling Lucas Stach
2024-05-07 12:15 ` Robert Foss
2024-05-03 15:11 ` [PATCH 03/14] drm/bridge: analogix_dp: register AUX bus after enabling runtime PM Lucas Stach
2024-05-07 12:49 ` Robert Foss
2024-05-03 15:11 ` [PATCH 04/14] drm/bridge: analogix_dp: handle clock via " Lucas Stach
2024-05-07 12:57 ` Robert Foss
2024-05-03 15:11 ` [PATCH 05/14] drm/bridge: analogix_dp: remove unused analogix_dp_remove Lucas Stach
2024-05-07 12:58 ` Robert Foss
2024-05-03 15:11 ` [PATCH 06/14] drm/bridge: analogix_dp: remove clk handling from analogix_dp_set_bridge Lucas Stach
2024-05-07 13:00 ` Robert Foss
2024-05-03 15:11 ` [PATCH 07/14] drm/bridge: analogix_dp: move platform and PHY power handling into runtime PM Lucas Stach
2024-05-07 13:01 ` Robert Foss
2024-05-03 15:11 ` [PATCH 08/14] drm/bridge: analogix_dp: move basic controller init " Lucas Stach
2024-05-07 13:05 ` Robert Foss
2024-05-03 15:11 ` [PATCH 09/14] drm/bridge: analogix_dp: remove PLL lock check from analogix_dp_config_video Lucas Stach
2024-05-07 13:06 ` Robert Foss
2024-05-03 15:11 ` [PATCH 10/14] drm/bridge: analogix_dp: move macro reset after link bandwidth setting Lucas Stach
2024-05-07 13:07 ` Robert Foss [this message]
2024-05-03 15:11 ` [PATCH 11/14] drm/bridge: analogix_dp: don't wait for PLL lock too early Lucas Stach
2024-05-03 15:11 ` [PATCH 12/14] drm/bridge: analogix_dp: simplify and correct PLL lock checks Lucas Stach
2024-05-03 15:11 ` [PATCH 13/14] drm/bridge: analogix_dp: only read AUX status when an error occured Lucas Stach
2024-05-03 15:11 ` [PATCH 14/14] drm/bridge: analogix_dp: handle AUX transfer timeouts Lucas Stach
2024-05-07 13:10 ` [PATCH 00/14] improve Analogix DP AUX channel handling Robert Foss
2024-05-15 10:31 ` Lucas Stach
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