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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "Manna, Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"Murthy, Arun R" <arun.r.murthy@intel.com>,
	"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [PATCH v3 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL
Date: Fri, 3 May 2024 07:48:22 +0000	[thread overview]
Message-ID: <8996bb1d911feaecff7c551853f6f020480a33a2.camel@intel.com> (raw)
In-Reply-To: <20240424183820.3591593-6-animesh.manna@intel.com>

On Thu, 2024-04-25 at 00:08 +0530, Animesh Manna wrote:
> Set the Link Off Between Frames Enable bit in ALPM_CTL register.
> 
> Note: Lobf need to be enabled adaptive sync fixed refresh mode
> where vmin = vmax = flipline, which will arise after cmmr feature
> enablement. Will add enabling sequence in a separate patch.

Is adaptive sync needed for both Aux Wake and Aux Less Wake?

> 
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 13 +++++++++----
>  drivers/gpu/drm/i915/display/intel_alpm.h |  4 ++--
>  drivers/gpu/drm/i915/display/intel_psr.c  |  2 +-
>  3 files changed, 12 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 3bb69ed16aab..b08799586b58 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -290,10 +290,11 @@ void intel_alpm_compute_lobf_config(struct
> intel_dp *intel_dp,
>         }
>  }
>  
> -static void lnl_alpm_configure(struct intel_dp *intel_dp)
> +static void lnl_alpm_configure(struct intel_dp *intel_dp,
> +                              const struct intel_crtc_state
> *crtc_state)
>  {
>         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -       enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> +       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>         u32 alpm_ctl;
>  
>         if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp-
> >psr.psr2_enabled &&
> @@ -329,12 +330,16 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
>                            ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp-
> >alpm_parameters.fast_wake_lines);
>         }
>  
> +       if (crtc_state->has_lobf)
> +               alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
> +

How you are planning to differentiate between AUX Wake and AUX Less
Wake for LOBF?

BR,

Jouni Högander

>         alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp-
> >alpm_parameters.check_entry_lines);
>  
>         intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
>  }
>  
> -void intel_alpm_configure(struct intel_dp *intel_dp)
> +void intel_alpm_configure(struct intel_dp *intel_dp,
> +                         const struct intel_crtc_state *crtc_state)
>  {
> -       lnl_alpm_configure(intel_dp);
> +       lnl_alpm_configure(intel_dp, crtc_state);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> b/drivers/gpu/drm/i915/display/intel_alpm.h
> index b9602b71d28f..a9ca190da3e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -18,6 +18,6 @@ bool intel_alpm_compute_params(struct intel_dp
> *intel_dp,
>  void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
>                                     struct intel_crtc_state
> *crtc_state,
>                                     struct drm_connector_state
> *conn_state);
> -void intel_alpm_configure(struct intel_dp *intel_dp);
> -
> +void intel_alpm_configure(struct intel_dp *intel_dp,
> +                         const struct intel_crtc_state *crtc_state);
>  #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index c4ab289dbc15..4eb45df20ad2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1611,7 +1611,7 @@ static void intel_psr_enable_source(struct
> intel_dp *intel_dp,
>                              IGNORE_PSR2_HW_TRACKING : 0);
>  
>         if (intel_dp_is_edp(intel_dp))
> -               intel_alpm_configure(intel_dp);
> +               intel_alpm_configure(intel_dp, crtc_state);
>  
>         /*
>          * Wa_16013835468


  reply	other threads:[~2024-05-03  7:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-24 18:38 [PATCH v3 0/6] Link off between frames for edp Animesh Manna
2024-04-24 18:38 ` [PATCH v3 1/6] drm/i915/alpm: Move alpm parameters from intel_psr Animesh Manna
2024-04-24 18:38 ` [PATCH v3 2/6] drm/i915/alpm: Move alpm related code to a new file Animesh Manna
2024-04-26  7:55   ` kernel test robot
2024-04-24 18:38 ` [PATCH v3 3/6] drm/display: Add missing aux less alpm wake related bits Animesh Manna
2024-04-24 18:38 ` [PATCH v3 4/6] drm/i915/alpm: Add compute config for lobf Animesh Manna
2024-04-26 17:42   ` kernel test robot
2024-05-03  7:19   ` Hogander, Jouni
2024-05-03  8:42     ` Manna, Animesh
2024-05-03  9:40       ` Hogander, Jouni
2024-04-24 18:38 ` [PATCH v3 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL Animesh Manna
2024-05-03  7:48   ` Hogander, Jouni [this message]
2024-05-03  8:19     ` Manna, Animesh
2024-05-03  9:33       ` Hogander, Jouni
2024-04-24 18:38 ` [PATCH v3 6/6] drm/i915/alpm: Add debugfs for LOBF Animesh Manna
2024-05-03  7:31   ` Hogander, Jouni
2024-05-03  8:30     ` Manna, Animesh
2024-05-03  9:37       ` Hogander, Jouni
2024-05-03  9:52 ` [PATCH v3 0/6] Link off between frames for edp Hogander, Jouni

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