From: Rob Herring <robh@kernel.org>
To: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org
Subject: Re: [PATCH v2 04/12] dt-bindings: dma: Document STM32 DMA3 controller bindings
Date: Fri, 10 May 2024 16:08:06 -0500 [thread overview]
Message-ID: <20240510210806.GA746731-robh@kernel.org> (raw)
In-Reply-To: <20240507125442.3989284-5-amelie.delaunay@foss.st.com>
On Tue, May 07, 2024 at 02:54:34PM +0200, Amelie Delaunay wrote:
> The STM32 DMA3 is a Direct Memory Access controller with different features
> depending on its hardware configuration.
> The channels have not the same capabilities, some have a larger FIFO, so
> their performance is higher.
> This patch describes STM32 DMA3 bindings, used to select a channel that
> fits client requirements, and to pre-configure the channel depending on
> the client needs.
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> ---
> v2:
> - DMA controller specific information description has been moved and
> added as description of #dma-cells property
> - description has been added to interrupts property specifying the
> expected format for channel interrupts
> - compatible has been updated to st,stm32mp25-dma3 (SoC specific)
> ---
> .../bindings/dma/stm32/st,stm32-dma3.yaml | 129 ++++++++++++++++++
> 1 file changed, 129 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml
> new file mode 100644
> index 000000000000..ed2a84fe2535
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml
> @@ -0,0 +1,129 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics STM32 DMA3 Controller
> +
> +description: |
> + The STM32 DMA3 is a direct memory access controller with different features depending on its
> + hardware configuration.
> + It is either called LPDMA (Low Power), GPDMA (General Purpose) or HPDMA (High Performance).
> + Its hardware configuration registers allow to dynamically expose its features.
> +
> + GPDMA and HPDMA support 16 independent DMA channels, while only 4 for LPDMA.
> + GPDMA and HPDMA support 256 DMA requests from peripherals, 8 for LPDMA.
> +
> + Bindings are generic for these 3 STM32 DMA3 configurations.
> +
> + DMA clients connected to the STM32 DMA3 controller must use the format described in "#dma-cells"
> + property description below, using a three-cell specifier for each channel.
Wrap lines at 80 unless there is some exception to go to 100.
> +
> +maintainers:
> + - Amelie Delaunay <amelie.delaunay@foss.st.com>
> +
> +allOf:
> + - $ref: /schemas/dma/dma-controller.yaml#
> +
> +properties:
> + compatible:
> + const: st,stm32mp25-dma3
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + minItems: 4
> + maxItems: 16
> + description: |
Don't need '|' if no formatting to preserve.
With those fixed,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> + Should contain all of the per-channel DMA interrupts in ascending order with respect to the
> + DMA channel index.
next prev parent reply other threads:[~2024-05-10 21:08 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 12:54 [PATCH v2 00/12] Introduce STM32 DMA3 support Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 01/12] dt-bindings: dma: New directory for STM32 DMA controllers bindings Amelie Delaunay
2024-05-10 21:05 ` Rob Herring (Arm)
2024-05-07 12:54 ` [PATCH v2 02/12] dmaengine: stm32: New directory for STM32 DMA controllers drivers Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 03/12] MAINTAINERS: Add entry for STM32 DMA controllers drivers and documentation Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 04/12] dt-bindings: dma: Document STM32 DMA3 controller bindings Amelie Delaunay
2024-05-10 21:08 ` Rob Herring [this message]
2024-05-07 12:54 ` [PATCH v2 05/12] dmaengine: Add STM32 DMA3 support Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 06/12] dmaengine: stm32-dma3: add DMA_CYCLIC capability Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 07/12] dmaengine: stm32-dma3: add DMA_MEMCPY capability Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 08/12] dmaengine: stm32-dma3: add device_pause and device_resume ops Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 09/12] dmaengine: stm32-dma3: improve residue granularity Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 10/12] dmaengine: add channel device name to channel registration Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 11/12] dmaengine: stm32-dma3: defer channel registration to specify channel name Amelie Delaunay
2024-05-07 12:54 ` [PATCH v2 12/12] arm64: dts: st: add HPDMA nodes on stm32mp251 Amelie Delaunay
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