From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
To: vkoul@kernel.org, jingoohan1@gmail.com, conor+dt@kernel.org,
konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org,
robh+dt@kernel.org
Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
dmitry.baryshkov@linaro.org, quic_krichai@quicinc.com,
quic_vbadigan@quicinc.com, quic_parass@quicinc.com,
quic_schintav@quicinc.com, quic_shijjose@quicinc.com,
"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Serge Semin" <fancer.lancer@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
mhi@lists.linux.dev
Subject: [PATCH v1 2/6] dmaengine: dw-edma: Introduce helpers for getting the eDMA/HDMA max channel count
Date: Fri, 19 Jan 2024 18:30:18 +0530 [thread overview]
Message-ID: <1705669223-5655-3-git-send-email-quic_msarkar@quicinc.com> (raw)
In-Reply-To: <1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Add common helpers for getting the eDMA/HDMA max channel count.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
drivers/dma/dw-edma/dw-edma-core.c | 18 ++++++++++++++++++
drivers/pci/controller/dwc/pcie-designware.c | 6 +++---
include/linux/dma/edma.h | 14 ++++++++++++++
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
index 7fe1c19..2bd6e43 100644
--- a/drivers/dma/dw-edma/dw-edma-core.c
+++ b/drivers/dma/dw-edma/dw-edma-core.c
@@ -902,6 +902,24 @@ static int dw_edma_irq_request(struct dw_edma *dw,
return err;
}
+static u32 dw_edma_get_max_ch(enum dw_edma_map_format mf, enum dw_edma_dir dir)
+{
+ if (mf == EDMA_MF_HDMA_NATIVE)
+ return HDMA_MAX_NR_CH;
+
+ return dir == EDMA_DIR_WRITE ? EDMA_MAX_WR_CH : EDMA_MAX_RD_CH;
+}
+
+u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
+{
+ return dw_edma_get_max_ch(mf, EDMA_DIR_READ);
+}
+
+u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
+{
+ return dw_edma_get_max_ch(mf, EDMA_DIR_WRITE);
+}
+
int dw_edma_probe(struct dw_edma_chip *chip)
{
struct device *dev;
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index eca047a..96575b8 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -864,7 +864,7 @@ static int dw_pcie_edma_irq_vector(struct dw_edma_chip *edma, unsigned int nr)
char name[6];
int ret;
- if (nr >= EDMA_MAX_WR_CH + EDMA_MAX_RD_CH)
+ if (nr >= dw_edma_get_max_rd_ch(edma->mf) + dw_edma_get_max_wr_ch(edma->mf))
return -EINVAL;
ret = platform_get_irq_byname_optional(pdev, "dma");
@@ -923,8 +923,8 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val);
/* Sanity check the channels count if the mapping was incorrect */
- if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > EDMA_MAX_WR_CH ||
- !pci->edma.ll_rd_cnt || pci->edma.ll_rd_cnt > EDMA_MAX_RD_CH)
+ if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > dw_edma_get_max_wr_ch(pci->edma.mf) ||
+ !pci->edma.ll_rd_cnt || pci->edma.ll_rd_cnt > dw_edma_get_max_rd_ch(pci->edma.mf))
return -EINVAL;
return 0;
diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
index 7197a58..550f6a4 100644
--- a/include/linux/dma/edma.h
+++ b/include/linux/dma/edma.h
@@ -106,6 +106,9 @@ struct dw_edma_chip {
#if IS_REACHABLE(CONFIG_DW_EDMA)
int dw_edma_probe(struct dw_edma_chip *chip);
int dw_edma_remove(struct dw_edma_chip *chip);
+
+u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf);
+u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf);
#else
static inline int dw_edma_probe(struct dw_edma_chip *chip)
{
@@ -116,6 +119,17 @@ static inline int dw_edma_remove(struct dw_edma_chip *chip)
{
return 0;
}
+
+static inline u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
+{
+ return 0;
+}
+
+static inline u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
+{
+ return 0;
+}
+
#endif /* CONFIG_DW_EDMA */
#endif /* _DW_EDMA_H */
--
2.7.4
next prev parent reply other threads:[~2024-01-19 13:00 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 13:00 [PATCH v1 0/6] Add Change to integrate HDMA with dwc ep driver Mrinmay Sarkar
2024-01-19 13:00 ` [PATCH v1 1/6] dmaengine: dw-edma: Pass 'struct dw_edma_chip' to irq_vector() Mrinmay Sarkar
2024-01-19 13:23 ` Dmitry Baryshkov
2024-02-02 10:50 ` Serge Semin
2024-01-19 13:00 ` Mrinmay Sarkar [this message]
2024-01-19 13:26 ` [PATCH v1 2/6] dmaengine: dw-edma: Introduce helpers for getting the eDMA/HDMA max channel count Dmitry Baryshkov
2024-01-30 8:48 ` Manivannan Sadhasivam
2024-02-02 10:51 ` Serge Semin
2024-01-19 13:00 ` [PATCH v1 3/6] PCI: dwc: Add HDMA support Mrinmay Sarkar
2024-02-02 21:40 ` Serge Semin
2024-02-07 17:06 ` Manivannan Sadhasivam
2024-02-09 17:10 ` Bjorn Helgaas
2024-02-11 19:37 ` Serge Semin
2024-02-13 7:53 ` Manivannan Sadhasivam
2024-01-19 13:00 ` [PATCH v1 4/6] dmaengine: dw-edma: Move HDMA_V0_MAX_NR_CH definition to edma.h Mrinmay Sarkar
2024-02-02 10:47 ` Serge Semin
2024-02-02 12:26 ` Manivannan Sadhasivam
2024-01-19 13:00 ` [PATCH v1 5/6] PCI: qcom-ep: Provide number of read/write channel for HDMA Mrinmay Sarkar
2024-01-30 8:53 ` Manivannan Sadhasivam
2024-01-30 13:18 ` Mrinmay Sarkar
2024-01-19 13:00 ` [PATCH v1 6/6] PCI: epf-mhi: Add flag to enable HDMA for SA8775P Mrinmay Sarkar
2024-01-30 8:53 ` Manivannan Sadhasivam
2024-01-30 10:00 ` [PATCH v1 0/6] Add Change to integrate HDMA with dwc ep driver Serge Semin
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