From: Claudiu <claudiu.beznea@tuxon.dev>
To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de
Cc: cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com,
prabhakar.mahadev-lad.rj@bp.renesas.com
Subject: [PATCH 6.1.y-cip 01/44] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3S SoC
Date: Fri, 19 Apr 2024 14:37:59 +0300 [thread overview]
Message-ID: <20240419113842.3675543-2-claudiu.beznea.uj@bp.renesas.com> (raw)
In-Reply-To: <20240419113842.3675543-1-claudiu.beznea.uj@bp.renesas.com>
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
commit 111287aa60004e1a58320048c89391056288c455 upstream.
Document RZ/G3S (R9A08G045) SYSC bindings. The SYSC block found on the
RZ/G3S SoC is similar to the one found on the RZ/G2UL.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
.../devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
index 398663d21ab1..4d32f8160db1 100644
--- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
@@ -23,6 +23,7 @@ properties:
- renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five
- renesas,r9a07g044-sysc # RZ/G2{L,LC}
- renesas,r9a07g054-sysc # RZ/V2L
+ - renesas,r9a08g045-sysc # RZ/G3S
reg:
maxItems: 1
--
2.39.2
next prev parent reply other threads:[~2024-04-19 11:38 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-19 11:37 [PATCH 6.1.y-cip 00/44] Add initial support for the Renesas RZ/G3S SoC Claudiu
2024-04-19 11:37 ` Claudiu [this message]
2024-04-19 11:38 ` [PATCH 6.1.y-cip 02/44] dt-bindings: soc: renesas: Document Renesas RZ/G3S SoC variants Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 03/44] clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 04/44] clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic() Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 05/44] clk: renesas: rzg2l: Use u32 for flag and mux_flags Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 06/44] clk: renesas: rzg2l: Simplify .determine_rate() Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 07/44] clk: renesas: rzg2l: Use core->name for clock name Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 08/44] clk: renesas: rzg2l: Simplify the logic in rzg2l_mod_clock_endisable() Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 09/44] clk: renesas: rzg2l: Remove critical area Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 10/44] clk: renesas: rzg2l: Add support for RZ/G3S PLL Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 11/44] clk: renesas: rzg2l: Add struct clk_hw_data Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 12/44] clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 13/44] clk: renesas: rzg2l: Refactor SD mux driver Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 14/44] clk: renesas: rzg2l: Add divider clock for RZ/G3S Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 15/44] dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 16/44] clk: renesas: Add minimal boot support for " Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 17/44] clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2 Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 18/44] clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 19/44] soc: renesas: Use "#ifdef" for single-symbol definition checks Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 20/44] soc: renesas: Identify RZ/G3S SoC Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 21/44] pinctrl: renesas: rzg2l: Make struct rzg2l_pinctrl_data::dedicated_pins constant Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 22/44] pinctrl: renesas: rzg2l: Rename rzg2l_gpio_configs[] Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 23/44] pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 24/44] pinctrl: renesas: rzg2l: Index all registers based on port offset Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 25/44] pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 26/44] pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 27/44] pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 28/44] pinctrl: renesas: rzg2l: Add support for different DS values on different groups Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 29/44] dt-bindings: pinctrl: renesas: Document RZ/G3S SoC Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 30/44] pinctrl: renesas: rzg2l: Add RZ/G3S support Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 31/44] dt-bindings: mmc: renesas,sdhi: Document " Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 32/44] dt-bindings: serial: renesas,scif: document r9a08g045 support Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 33/44] dt-bindings: soc: renesas: Document RZ/G3S SMARC SoM Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 34/44] dt-bindings: soc: renesas: Document SMARC Carrier-II EVK Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 35/44] arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 36/44] arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 37/44] arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 38/44] arm64: dts: renesas: Add initial device tree for RZ/G3S SMARC EVK board Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 39/44] arm64: dts: renesas: r9a08g045: Add nodes for SDHI1 and SDHI2 Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 40/44] arm64: dts: renesas: r9a08g045: Add missing cache-level for L3 cache Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 41/44] arm64: dts: renesas: rzg3s-smarc-som: Spelling s/device-type/device_type/ Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 42/44] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 43/44] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1 Claudiu
2024-04-19 11:38 ` [PATCH 6.1.y-cip 44/44] arm64: defconfig: Enable RZ/G3S (R9A08G045) SoC Claudiu
2024-04-21 14:13 ` [PATCH 6.1.y-cip 00/44] Add initial support for the Renesas RZ/G3S SoC Pavel Machek
2024-04-22 20:37 ` Pavel Machek
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