From: Adrian Chadd <adrian@freebsd.org>
To: ath9k-devel@lists.ath9k.org
Subject: [ath9k-devel] ath9k MSI interupts
Date: Tue, 2 Aug 2016 10:45:28 -0700 [thread overview]
Message-ID: <CAJ-Vmo=xrw5xgsw-TfH7oz9N+HPCZxxsh6ge57bFuTPnBi9hQg@mail.gmail.com> (raw)
In-Reply-To: <F9D95AC275991E48901933FBF3337AB02D831CBA@ex-02>
Hi!
Firstly - please post your diffs somewhere so people can start to help. :)
ok, so:
I have an open copy of the ar9380 HAL in freebsd - find a freebsd tree
(eg github.com/freebsd/freebsd), it's in
sys/contrib/dev/ath/ath_hal/ar9300/ . Grep _MSI *.c and you'll see
wha'ts going on.
TL;DR:
* there are different INTCFG register bits for MSI:
ar9300reg.h:#define AR_INTCFG_REQ 0x00000001 // Interrupt
request flag
ar9300reg.h:#define AR_INTCFG_MSI_RXOK 0x00000000 // Rx
interrupt for MSI logic is RXOK
ar9300reg.h:#define AR_INTCFG_MSI_RXINTM 0x00000004 // Rx
interrupt for MSI logic is RXINTM
ar9300reg.h:#define AR_INTCFG_MSI_RXMINTR 0x00000006 // Rx
interrupt for MSI logic is RXMINTR
ar9300reg.h:#define AR_INTCFG_MSI_TXOK 0x00000000 // Rx
interrupt for MSI logic is TXOK
ar9300reg.h:#define AR_INTCFG_MSI_TXINTM 0x00000010 // Rx
interrupt for MSI logic is TXINTM
ar9300reg.h:#define AR_INTCFG_MSI_TXMINTR 0x00000018 // Rx
interrupt for MSI logic is TXMINTR
.. and the register:
ar9300reg.h:#define AR_INTCFG AR_MAC_DMA_OFFSET(MAC_DMA_INTER)
osprey_reg_map.h: volatile u_int32_t MAC_DMA_INTER; /*
0x5c - 0x60 */
.. and it's offset into the register window as 0x0, so it's actually
register 0x5c.
ok, so that's required to get the MSI interrupts to fire.
there's different logic in get_pending_interrupts() based on whether
it's MSI or not.
Ther'es also this:
ar9300.h: u_int32_t ah_msi_reg; /* copy of AR_PCIE_MSI */
ar9300.h: u_int32_t AR_PCIE_MSI;
ar9300reg.h:#define AR_PCIE_MSI_ENABLE 0x00000001
ar9300reg.h:#define AR_PCIE_MSI_HW_DBI_WR_EN 0x02000000
ar9300reg.h:#define AR_PCIE_MSI_HW_INT_PENDING_ADDR
0xFFA0C1FF // bits 8..11: value must be 0x5060
ar9300reg.h:#define AR_PCIE_MSI_HW_INT_PENDING_ADDR_MSI_64
0xFFA0C9FF // bits 8..11: value must be 0x5064
There's code at the end of ar9300_get_pending_interrupts() and
ar9300_set_interrupts() that messes with the MSI interrupt register
above.
So I'd grep the ar9300 HAL code for:
_MSI *c
ah_msi_reg
AR_INTCFG
AR_PCIE_MSI
HTH,
-adrian
next prev parent reply other threads:[~2016-08-02 17:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-01 17:19 [ath9k-devel] ath9k MSI interupts Lamar Hansford
2016-08-02 17:45 ` Adrian Chadd [this message]
-- strict thread matches above, loose matches on Subject: below --
2016-08-01 17:25 Lamar Hansford
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAJ-Vmo=xrw5xgsw-TfH7oz9N+HPCZxxsh6ge57bFuTPnBi9hQg@mail.gmail.com' \
--to=adrian@freebsd.org \
--cc=ath9k-devel@lists.ath9k.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).