From: Kalle Valo <kvalo@qca.qualcomm.com>
To: ath9k-devel@lists.ath9k.org
Subject: [ath9k-devel] ath9k: Proper TX99 interrupt ref count
Date: Sat, 28 May 2016 10:24:34 +0200 [thread overview]
Message-ID: <280f912735014ef9b058415b1272da4f@euamsexm01a.eu.qualcomm.com> (raw)
In-Reply-To: <1463670929-12639-1-git-send-email-eduardo.abinader@riverbed.com>
Eduardo Abinader <eabinader@ocedo.com> wrote:
> On TX99 mode, instead of assuming interrupt mask non ATH9K_INT_GLOBAL,
> let ath9k_hw_disable_interrupts proper set interrupt ref count.
> This prevents some PCI PERR occurring specialy when setting 11b and n rates.
>
> Signed-off-by: Eduardo Abinader <eduardo.abinader@riverbed.com>
Thanks, 1 patch applied to ath.git:
8a0a36cf98db ath9k: Proper TX99 interrupt ref count
--
Sent by pwcli
https://patchwork.kernel.org/patch/9127799/
prev parent reply other threads:[~2016-05-28 8:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-19 15:15 [ath9k-devel] [PATCH] ath9k: Proper TX99 interrupt ref count Eduardo Abinader
2016-05-28 8:24 ` Kalle Valo [this message]
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