From: Sunil Khatri <sunil.khatri@amd.com>
To: "Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org, Sunil Khatri <sunil.khatri@amd.com>
Subject: [PATCH v2 1/4] drm/amdgpu: update the ip_dump to ipdump_core
Date: Mon, 13 May 2024 19:27:11 +0530 [thread overview]
Message-ID: <20240513135714.296582-2-sunil.khatri@amd.com> (raw)
In-Reply-To: <20240513135714.296582-1-sunil.khatri@amd.com>
Update the memory pointer from ip_dump to ipdump_core
to make it specific to core registers and rest other
registers to be dumped in their respective memories.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14 +++++++-------
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 109f471ff315..30d7f9c29478 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -435,7 +435,7 @@ struct amdgpu_gfx {
bool mcbp; /* mid command buffer preemption */
/* IP reg dump */
- uint32_t *ip_dump;
+ uint32_t *ipdump_core;
};
struct amdgpu_gfx_ras_reg_entry {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 953df202953a..f6d6a4b9802d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4603,9 +4603,9 @@ static void gfx_v10_0_alloc_dump_mem(struct amdgpu_device *adev)
ptr = kcalloc(reg_count, sizeof(uint32_t), GFP_KERNEL);
if (ptr == NULL) {
DRM_ERROR("Failed to allocate memory for IP Dump\n");
- adev->gfx.ip_dump = NULL;
+ adev->gfx.ipdump_core = NULL;
} else {
- adev->gfx.ip_dump = ptr;
+ adev->gfx.ipdump_core = ptr;
}
}
@@ -4815,7 +4815,7 @@ static int gfx_v10_0_sw_fini(void *handle)
gfx_v10_0_free_microcode(adev);
- kfree(adev->gfx.ip_dump);
+ kfree(adev->gfx.ipdump_core);
return 0;
}
@@ -9283,13 +9283,13 @@ static void gfx_v10_ip_print(void *handle, struct drm_printer *p)
uint32_t i;
uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);
- if (!adev->gfx.ip_dump)
+ if (!adev->gfx.ipdump_core)
return;
for (i = 0; i < reg_count; i++)
drm_printf(p, "%-50s \t 0x%08x\n",
gc_reg_list_10_1[i].reg_name,
- adev->gfx.ip_dump[i]);
+ adev->gfx.ipdump_core[i]);
}
static void gfx_v10_ip_dump(void *handle)
@@ -9298,12 +9298,12 @@ static void gfx_v10_ip_dump(void *handle)
uint32_t i;
uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);
- if (!adev->gfx.ip_dump)
+ if (!adev->gfx.ipdump_core)
return;
amdgpu_gfx_off_ctrl(adev, false);
for (i = 0; i < reg_count; i++)
- adev->gfx.ip_dump[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
+ adev->gfx.ipdump_core[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
amdgpu_gfx_off_ctrl(adev, true);
}
--
2.34.1
next prev parent reply other threads:[~2024-05-13 13:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-13 13:57 [PATCH v1 0/4] Add CP and GFX Queue register in ip Dump for Sunil Khatri
2024-05-13 13:57 ` Sunil Khatri [this message]
2024-05-13 13:57 ` [PATCH v2 2/4] drm/amdgpu: Add support to dump gfx10 cp registers Sunil Khatri
2024-05-13 13:57 ` [PATCH v2 3/4] drm/amdgpu: add support to dump gfx10 queue registers Sunil Khatri
2024-05-13 13:57 ` [PATCH v2 4/4] drm/amdgpu: add prints while ip registr dump Sunil Khatri
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