* [PATCH] amdkfd: fix the cwsr trap handler for gfx11
@ 2024-01-31 18:50 Laurent Morichetti
2024-01-31 20:30 ` Jay Cornwall
0 siblings, 1 reply; 4+ messages in thread
From: Laurent Morichetti @ 2024-01-31 18:50 UTC (permalink / raw
To: amd-gfx; +Cc: jay.cornwall, Lancelot Six, Laurent Morichetti
Call the 2nd level trap handler if the cwsr handler is entered with any
one of wave_state, wave_end, or trap_after_inst exceptions.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Tested-by: Lancelot Six <lancelot.six@amd.com>
---
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 2 +-
.../drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 17 ++++++++++++++++-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
index d1caaf0e6a7c..2e9b64edb8d2 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
@@ -2518,7 +2518,7 @@ static const uint32_t cwsr_trap_gfx11_hex[] = {
0x8b6eff7b, 0x00000400,
0xbfa20045, 0xbf830010,
0xb8fbf803, 0xbfa0fffa,
- 0x8b6eff7b, 0x00000900,
+ 0x8b6eff7b, 0x00160900,
0xbfa20015, 0x8b6eff7b,
0x000071ff, 0xbfa10008,
0x8b6fff7b, 0x00007080,
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
index 71b3dc0c7363..7568ff3af978 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
@@ -81,6 +81,11 @@ var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11
var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21
var SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK = 0x800
var SQ_WAVE_TRAPSTS_EXCP_HI_MASK = 0x7000
+#if ASIC_FAMILY >= CHIP_PLUM_BONITO
+var SQ_WAVE_TRAPSTS_WAVE_START_MASK = 0x20000
+var SQ_WAVE_TRAPSTS_WAVE_END_MASK = 0x40000
+var SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK = 0x100000
+#endif
var SQ_WAVE_MODE_EXCP_EN_SHIFT = 12
var SQ_WAVE_MODE_EXCP_EN_ADDR_WATCH_SHIFT = 19
@@ -92,6 +97,16 @@ var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK = 0x003F8000
var SQ_WAVE_MODE_DEBUG_EN_MASK = 0x800
+#if ASIC_FAMILY < CHIP_PLUM_BONITO
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+#else
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK |\
+ SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_START_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_END_MASK |\
+ SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK
+#endif
+
// bits [31:24] unused by SPI debug data
var TTMP11_SAVE_REPLAY_W64H_SHIFT = 31
var TTMP11_SAVE_REPLAY_W64H_MASK = 0x80000000
@@ -224,7 +239,7 @@ L_NOT_HALTED:
// Check non-maskable exceptions. memory_violation, illegal_instruction
// and xnack_error exceptions always cause the wave to enter the trap
// handler.
- s_and_b32 ttmp2, s_save_trapsts, SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+ s_and_b32 ttmp2, s_save_trapsts, S_TRAPSTS_NON_MASKABLE_EXCP_MASK
s_cbranch_scc1 L_FETCH_2ND_TRAP
// Check for maskable exceptions in trapsts.excp and trapsts.excp_hi.
base-commit: 5c75a8a293f3e8f31e5ac10d3a6b87451028e5e6
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] amdkfd: fix the cwsr trap handler for gfx11
2024-01-31 18:50 [PATCH] amdkfd: fix the cwsr trap handler for gfx11 Laurent Morichetti
@ 2024-01-31 20:30 ` Jay Cornwall
2024-02-01 21:33 ` [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler Laurent Morichetti
0 siblings, 1 reply; 4+ messages in thread
From: Jay Cornwall @ 2024-01-31 20:30 UTC (permalink / raw
To: Laurent Morichetti, amd-gfx; +Cc: Lancelot Six
On 1/31/2024 12:50, Laurent Morichetti wrote:
> Call the 2nd level trap handler if the cwsr handler is entered with any
> one of wave_state, wave_end, or trap_after_inst exceptions.
^ wave_start
A more descriptive title would be helpful. Perhaps something like "Pass debug exceptions to second-level trap handler".
Besides that:
Reviewed-by: Jay Cornwall <jay.cornwall@amd.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler
2024-01-31 20:30 ` Jay Cornwall
@ 2024-02-01 21:33 ` Laurent Morichetti
2024-02-06 19:58 ` Deucher, Alexander
0 siblings, 1 reply; 4+ messages in thread
From: Laurent Morichetti @ 2024-02-01 21:33 UTC (permalink / raw
To: amd-gfx; +Cc: jay.cornwall.six, Laurent Morichetti, Lancelot Six, Jay Cornwall
Call the 2nd level trap handler if the cwsr handler is entered with any
one of wave_start, wave_end, or trap_after_inst exceptions.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Tested-by: Lancelot Six <lancelot.six@amd.com>
Reviewed-by: Jay Cornwall <jay.cornwall@amd.com>
---
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 2 +-
.../drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 17 ++++++++++++++++-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
index d1caaf0e6a7c..2e9b64edb8d2 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
@@ -2518,7 +2518,7 @@ static const uint32_t cwsr_trap_gfx11_hex[] = {
0x8b6eff7b, 0x00000400,
0xbfa20045, 0xbf830010,
0xb8fbf803, 0xbfa0fffa,
- 0x8b6eff7b, 0x00000900,
+ 0x8b6eff7b, 0x00160900,
0xbfa20015, 0x8b6eff7b,
0x000071ff, 0xbfa10008,
0x8b6fff7b, 0x00007080,
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
index 71b3dc0c7363..7568ff3af978 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
@@ -81,6 +81,11 @@ var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11
var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21
var SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK = 0x800
var SQ_WAVE_TRAPSTS_EXCP_HI_MASK = 0x7000
+#if ASIC_FAMILY >= CHIP_PLUM_BONITO
+var SQ_WAVE_TRAPSTS_WAVE_START_MASK = 0x20000
+var SQ_WAVE_TRAPSTS_WAVE_END_MASK = 0x40000
+var SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK = 0x100000
+#endif
var SQ_WAVE_MODE_EXCP_EN_SHIFT = 12
var SQ_WAVE_MODE_EXCP_EN_ADDR_WATCH_SHIFT = 19
@@ -92,6 +97,16 @@ var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK = 0x003F8000
var SQ_WAVE_MODE_DEBUG_EN_MASK = 0x800
+#if ASIC_FAMILY < CHIP_PLUM_BONITO
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+#else
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK |\
+ SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_START_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_END_MASK |\
+ SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK
+#endif
+
// bits [31:24] unused by SPI debug data
var TTMP11_SAVE_REPLAY_W64H_SHIFT = 31
var TTMP11_SAVE_REPLAY_W64H_MASK = 0x80000000
@@ -224,7 +239,7 @@ L_NOT_HALTED:
// Check non-maskable exceptions. memory_violation, illegal_instruction
// and xnack_error exceptions always cause the wave to enter the trap
// handler.
- s_and_b32 ttmp2, s_save_trapsts, SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+ s_and_b32 ttmp2, s_save_trapsts, S_TRAPSTS_NON_MASKABLE_EXCP_MASK
s_cbranch_scc1 L_FETCH_2ND_TRAP
// Check for maskable exceptions in trapsts.excp and trapsts.excp_hi.
base-commit: c4b562a17829454713e45219fa754be1bfda9004
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler
2024-02-01 21:33 ` [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler Laurent Morichetti
@ 2024-02-06 19:58 ` Deucher, Alexander
0 siblings, 0 replies; 4+ messages in thread
From: Deucher, Alexander @ 2024-02-06 19:58 UTC (permalink / raw
To: Morichetti, Laurent, amd-gfx@lists.freedesktop.org
Cc: jay.cornwall.six@amd.com, Six, Lancelot, Cornwall, Jay
[-- Attachment #1: Type: text/plain, Size: 4119 bytes --]
[AMD Official Use Only - General]
Acked-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Laurent Morichetti <laurent.morichetti@amd.com>
Sent: Thursday, February 1, 2024 4:33 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: jay.cornwall.six@amd.com <jay.cornwall.six@amd.com>; Morichetti, Laurent <Laurent.Morichetti@amd.com>; Six, Lancelot <Lancelot.Six@amd.com>; Cornwall, Jay <Jay.Cornwall@amd.com>
Subject: [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler
Call the 2nd level trap handler if the cwsr handler is entered with any
one of wave_start, wave_end, or trap_after_inst exceptions.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Tested-by: Lancelot Six <lancelot.six@amd.com>
Reviewed-by: Jay Cornwall <jay.cornwall@amd.com>
---
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 2 +-
.../drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 17 ++++++++++++++++-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
index d1caaf0e6a7c..2e9b64edb8d2 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
@@ -2518,7 +2518,7 @@ static const uint32_t cwsr_trap_gfx11_hex[] = {
0x8b6eff7b, 0x00000400,
0xbfa20045, 0xbf830010,
0xb8fbf803, 0xbfa0fffa,
- 0x8b6eff7b, 0x00000900,
+ 0x8b6eff7b, 0x00160900,
0xbfa20015, 0x8b6eff7b,
0x000071ff, 0xbfa10008,
0x8b6fff7b, 0x00007080,
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
index 71b3dc0c7363..7568ff3af978 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
@@ -81,6 +81,11 @@ var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11
var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21
var SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK = 0x800
var SQ_WAVE_TRAPSTS_EXCP_HI_MASK = 0x7000
+#if ASIC_FAMILY >= CHIP_PLUM_BONITO
+var SQ_WAVE_TRAPSTS_WAVE_START_MASK = 0x20000
+var SQ_WAVE_TRAPSTS_WAVE_END_MASK = 0x40000
+var SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK = 0x100000
+#endif
var SQ_WAVE_MODE_EXCP_EN_SHIFT = 12
var SQ_WAVE_MODE_EXCP_EN_ADDR_WATCH_SHIFT = 19
@@ -92,6 +97,16 @@ var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK = 0x003F8000
var SQ_WAVE_MODE_DEBUG_EN_MASK = 0x800
+#if ASIC_FAMILY < CHIP_PLUM_BONITO
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+#else
+var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK |\
+ SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_START_MASK |\
+ SQ_WAVE_TRAPSTS_WAVE_END_MASK |\
+ SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK
+#endif
+
// bits [31:24] unused by SPI debug data
var TTMP11_SAVE_REPLAY_W64H_SHIFT = 31
var TTMP11_SAVE_REPLAY_W64H_MASK = 0x80000000
@@ -224,7 +239,7 @@ L_NOT_HALTED:
// Check non-maskable exceptions. memory_violation, illegal_instruction
// and xnack_error exceptions always cause the wave to enter the trap
// handler.
- s_and_b32 ttmp2, s_save_trapsts, SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK
+ s_and_b32 ttmp2, s_save_trapsts, S_TRAPSTS_NON_MASKABLE_EXCP_MASK
s_cbranch_scc1 L_FETCH_2ND_TRAP
// Check for maskable exceptions in trapsts.excp and trapsts.excp_hi.
base-commit: c4b562a17829454713e45219fa754be1bfda9004
--
2.25.1
[-- Attachment #2: Type: text/html, Size: 8101 bytes --]
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2024-01-31 18:50 [PATCH] amdkfd: fix the cwsr trap handler for gfx11 Laurent Morichetti
2024-01-31 20:30 ` Jay Cornwall
2024-02-01 21:33 ` [PATCH v2] amdkfd: pass debug exceptions to second-level trap handler Laurent Morichetti
2024-02-06 19:58 ` Deucher, Alexander
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