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Tue, 02 Apr 2024 08:05:19 -0700 (PDT) Message-ID: Date: Tue, 2 Apr 2024 17:05:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN PATCH v3 1/7] x86/msi: address violation of MISRA C Rule 20.7 and coding style Content-Language: en-US To: Nicola Vetrini Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <2f2c865f20d0296e623f1d65bed25c083f5dd497.1711700095.git.nicola.vetrini@bugseng.com> From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2f2c865f20d0296e623f1d65bed25c083f5dd497.1711700095.git.nicola.vetrini@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.03.2024 10:11, Nicola Vetrini wrote: > MISRA C Rule 20.7 states: "Expressions resulting from the expansion > of macro parameters shall be enclosed in parentheses". Therefore, some > macro definitions should gain additional parentheses to ensure that all > current and future users will be safe with respect to expansions that > can possibly alter the semantics of the passed-in macro parameter. > > While at it, the style of these macros has been somewhat uniformed. > > No functional change. > > Signed-off-by: Nicola Vetrini > --- > Changes in v2: > - Make the style change more consistent > --- > xen/arch/x86/include/asm/msi.h | 49 +++++++++++++++++----------------- > 1 file changed, 25 insertions(+), 24 deletions(-) > > diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h > index 997ccb87be0c..bd110c357ce4 100644 > --- a/xen/arch/x86/include/asm/msi.h > +++ b/xen/arch/x86/include/asm/msi.h > @@ -147,33 +147,34 @@ int msi_free_irq(struct msi_desc *entry); > */ > #define NR_HP_RESERVED_VECTORS 20 > > -#define msi_control_reg(base) (base + PCI_MSI_FLAGS) > -#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) > -#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) > -#define msi_data_reg(base, is64bit) \ > - ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) > -#define msi_mask_bits_reg(base, is64bit) \ > - ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) > +#define msi_control_reg(base) ((base) + PCI_MSI_FLAGS) > +#define msi_lower_address_reg(base) ((base) + PCI_MSI_ADDRESS_LO) > +#define msi_upper_address_reg(base) ((base) + PCI_MSI_ADDRESS_HI) > +#define msi_data_reg(base, is64bit) \ > + (((is64bit) == 1) ? (base) + PCI_MSI_DATA_64 : (base) + PCI_MSI_DATA_32) > +#define msi_mask_bits_reg(base, is64bit) \ > + (((is64bit) == 1) ? (base) + PCI_MSI_MASK_BIT \ > + : (base) + PCI_MSI_MASK_BIT - 4) > #define msi_pending_bits_reg(base, is64bit) \ > - ((base) + PCI_MSI_MASK_BIT + ((is64bit) ? 4 : 0)) > -#define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE > + ((base) + PCI_MSI_MASK_BIT + ((is64bit) ? 4 : 0)) > +#define msi_disable(control) ({ (control) &= ~PCI_MSI_FLAGS_ENABLE }) > #define multi_msi_capable(control) \ > - (1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1)) > + (1 << (((control) & PCI_MSI_FLAGS_QMASK) >> 1)) > #define multi_msi_enable(control, num) \ > - control |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE); > -#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) > -#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) > -#define msi_enable(control, num) multi_msi_enable(control, num); \ > - control |= PCI_MSI_FLAGS_ENABLE > - > -#define msix_control_reg(base) (base + PCI_MSIX_FLAGS) > -#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) > -#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) > -#define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE > -#define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE > -#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) > -#define msix_unmask(address) (address & ~PCI_MSIX_VECTOR_BITMASK) > -#define msix_mask(address) (address | PCI_MSIX_VECTOR_BITMASK) > + ({ (control) |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE) }) > +#define is_64bit_address(control) (!!((control) & PCI_MSI_FLAGS_64BIT)) > +#define is_mask_bit_support(control) (!!((control) & PCI_MSI_FLAGS_MASKBIT)) > +#define msi_enable(control, num) ({ multi_msi_enable(control, num); \ > + (control) |= PCI_MSI_FLAGS_ENABLE }) Neither this nor ... > +#define msix_control_reg(base) ((base) + PCI_MSIX_FLAGS) > +#define msix_table_offset_reg(base) ((base) + PCI_MSIX_TABLE) > +#define msix_pba_offset_reg(base) ((base) + PCI_MSIX_PBA) > +#define msix_enable(control) ({ (control) |= PCI_MSIX_FLAGS_ENABLE }) > +#define msix_disable(control) ({ (control) &= ~PCI_MSIX_FLAGS_ENABLE }) ... these would compile afaict, if they were used. Once again - before fiddling with these we need to settle on which of these we want to keep (and then also use, rather than open-coding), and which to drop (instead of massaging). Jan