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Thu, 11 Apr 2024 03:31:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-379-gabd37849b7-fm-20240408.001-gabd37849 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: In-Reply-To: References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> Date: Thu, 11 Apr 2024 09:31:27 +0200 From: "Arnd Bergmann" To: "Ard Biesheuvel" , "Samuel Holland" Cc: "Thiago Jung Bauermann" , "Andrew Morton" , linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-kernel@vger.kernel.org, Linux-Arch , linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, "Christoph Hellwig" , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, "Alex Deucher" Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT Content-Type: text/plain On Thu, Apr 11, 2024, at 09:15, Ard Biesheuvel wrote: > On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: >> On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: >> > Samuel Holland writes: >> >> >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for >> >> 32-bit arm until we can provide these runtime library functions. >> > >> > Does this mean that patch 2 in this series: >> > >> > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT >> > >> > will be dropped? >> >> No, because later patches in the series (3, 6) depend on the definition of >> CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can >> find a GPL-2 compatible implementation of the runtime library functions. >> > > Is there really a point to doing that? Do 32-bit ARM systems even have > enough address space to the map the BARs of the AMD GPUs that need > this support? > > Given that this was not enabled before, I don't think the upshot of > this series should be that we enable support for something on 32-bit > ARM that may cause headaches down the road without any benefit. > > So I'd prefer a fixup patch that opts ARM out of this over adding > support code for 64-bit conversions. I have not found any dts file for a 32-bit platform with support for a 64-bit prefetchable BAR, and there are very few that even have a pcie slot (as opposed on on-board devices) you could plug a card into. That said, I also don't think we should encourage the use of floating-point code in random device drivers. There is really no excuse for the amdgpu driver to use floating point math here, and we should get AMD to fix their driver instead. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BE88CD128A for ; Thu, 11 Apr 2024 07:31:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Subject:Cc:To:From:Date:References: In-Reply-To:Message-Id:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CCjCIjjD3ST3yeUAemGZlY1fnvT7JmxOuZJZlKepXBM=; b=4Qfp6FgIuiZGJZ QXjfMm+mqvcG0+3xbcjYseonxRrzFPfGVbNBIrTJBnPHgd7uqA9PTFE2FJ5v39k7Frp72lqVGsIxK yUdn/r83KqkuX2l3glNaROgvVgx/wbtGXR2ZDToSliOKs3ooSv5eZUjh085HIH5iZ8dEbKOqxALF1 5QpwaOlfKVZ1VP+M58kLvnQJPgzuih1b84Rwf35nJHD7JzVucZbwNf/4fdRuG1elZUd2wmlKMJsJ1 md85jo61d3sSg+BtFXjid5treLACqQsI3VtuR1PwAgi7aFKwpRAl4BPb7u+jk1AgDiINd9PMqEDMb zeeEPZ0jnKcRvJnwaP6g==; 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Thu, 11 Apr 2024 03:31:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-379-gabd37849b7-fm-20240408.001-gabd37849 MIME-Version: 1.0 Message-Id: In-Reply-To: References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> Date: Thu, 11 Apr 2024 09:31:27 +0200 From: "Arnd Bergmann" To: "Ard Biesheuvel" , "Samuel Holland" Cc: "Thiago Jung Bauermann" , "Andrew Morton" , linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-kernel@vger.kernel.org, Linux-Arch , linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, "Christoph Hellwig" , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, "Alex Deucher" Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_003151_670264_9B9F3875 X-CRM114-Status: GOOD ( 20.17 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Apr 11, 2024, at 09:15, Ard Biesheuvel wrote: > On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: >> On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: >> > Samuel Holland writes: >> >> >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for >> >> 32-bit arm until we can provide these runtime library functions. >> > >> > Does this mean that patch 2 in this series: >> > >> > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT >> > >> > will be dropped? >> >> No, because later patches in the series (3, 6) depend on the definition of >> CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can >> find a GPL-2 compatible implementation of the runtime library functions. >> > > Is there really a point to doing that? Do 32-bit ARM systems even have > enough address space to the map the BARs of the AMD GPUs that need > this support? > > Given that this was not enabled before, I don't think the upshot of > this series should be that we enable support for something on 32-bit > ARM that may cause headaches down the road without any benefit. > > So I'd prefer a fixup patch that opts ARM out of this over adding > support code for 64-bit conversions. I have not found any dts file for a 32-bit platform with support for a 64-bit prefetchable BAR, and there are very few that even have a pcie slot (as opposed on on-board devices) you could plug a card into. That said, I also don't think we should encourage the use of floating-point code in random device drivers. There is really no excuse for the amdgpu driver to use floating point math here, and we should get AMD to fix their driver instead. Arnd _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A8B1CD1292 for ; Thu, 11 Apr 2024 07:32:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Subject:Cc:To:From:Date:References: In-Reply-To:Message-Id:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 11 Apr 2024 03:31:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-379-gabd37849b7-fm-20240408.001-gabd37849 MIME-Version: 1.0 Message-Id: In-Reply-To: References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> Date: Thu, 11 Apr 2024 09:31:27 +0200 From: "Arnd Bergmann" To: "Ard Biesheuvel" , "Samuel Holland" Cc: "Thiago Jung Bauermann" , "Andrew Morton" , linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-kernel@vger.kernel.org, Linux-Arch , linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, "Christoph Hellwig" , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, "Alex Deucher" Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_003151_670264_9B9F3875 X-CRM114-Status: GOOD ( 20.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 11, 2024, at 09:15, Ard Biesheuvel wrote: > On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: >> On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: >> > Samuel Holland writes: >> >> >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for >> >> 32-bit arm until we can provide these runtime library functions. >> > >> > Does this mean that patch 2 in this series: >> > >> > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT >> > >> > will be dropped? >> >> No, because later patches in the series (3, 6) depend on the definition of >> CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can >> find a GPL-2 compatible implementation of the runtime library functions. >> > > Is there really a point to doing that? Do 32-bit ARM systems even have > enough address space to the map the BARs of the AMD GPUs that need > this support? > > Given that this was not enabled before, I don't think the upshot of > this series should be that we enable support for something on 32-bit > ARM that may cause headaches down the road without any benefit. > > So I'd prefer a fixup patch that opts ARM out of this over adding > support code for 64-bit conversions. I have not found any dts file for a 32-bit platform with support for a 64-bit prefetchable BAR, and there are very few that even have a pcie slot (as opposed on on-board devices) you could plug a card into. That said, I also don't think we should encourage the use of floating-point code in random device drivers. There is really no excuse for the amdgpu driver to use floating point math here, and we should get AMD to fix their driver instead. Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7906ACD1292 for ; Thu, 11 Apr 2024 07:32:37 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=arndb.de header.i=@arndb.de header.a=rsa-sha256 header.s=fm2 header.b=fAFRq2a4; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.a=rsa-sha256 header.s=fm2 header.b=DzSFGGOr; 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Thu, 11 Apr 2024 03:31:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-379-gabd37849b7-fm-20240408.001-gabd37849 MIME-Version: 1.0 Message-Id: In-Reply-To: References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> Date: Thu, 11 Apr 2024 09:31:27 +0200 From: "Arnd Bergmann" To: "Ard Biesheuvel" , "Samuel Holland" Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-Arch , Thiago Jung Bauermann , x86@kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, Christoph Hellwig , loongarch@lists.linux.dev, Alex Deucher , Andrew Morton , linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Apr 11, 2024, at 09:15, Ard Biesheuvel wrote: > On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: >> On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: >> > Samuel Holland writes: >> >> >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for >> >> 32-bit arm until we can provide these runtime library functions. >> > >> > Does this mean that patch 2 in this series: >> > >> > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT >> > >> > will be dropped? >> >> No, because later patches in the series (3, 6) depend on the definition of >> CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can >> find a GPL-2 compatible implementation of the runtime library functions. >> > > Is there really a point to doing that? Do 32-bit ARM systems even have > enough address space to the map the BARs of the AMD GPUs that need > this support? > > Given that this was not enabled before, I don't think the upshot of > this series should be that we enable support for something on 32-bit > ARM that may cause headaches down the road without any benefit. > > So I'd prefer a fixup patch that opts ARM out of this over adding > support code for 64-bit conversions. I have not found any dts file for a 32-bit platform with support for a 64-bit prefetchable BAR, and there are very few that even have a pcie slot (as opposed on on-board devices) you could plug a card into. That said, I also don't think we should encourage the use of floating-point code in random device drivers. There is really no excuse for the amdgpu driver to use floating point math here, and we should get AMD to fix their driver instead. Arnd