From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2E61CD1290 for ; Fri, 29 Mar 2024 09:12:02 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699281.1092016 (Exim 4.92) (envelope-from ) id 1rq8H5-0001hj-Lj; Fri, 29 Mar 2024 09:11:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699281.1092016; Fri, 29 Mar 2024 09:11:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0001gK-Er; Fri, 29 Mar 2024 09:11:47 +0000 Received: by outflank-mailman (input) for mailman id 699281; Fri, 29 Mar 2024 09:11:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H4-0000ww-5C for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:46 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5cfe1f74-edac-11ee-a1ef-f123f15fe8a2; Fri, 29 Mar 2024 10:11:44 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 0A5614EE0748; Fri, 29 Mar 2024 10:11:44 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5cfe1f74-edac-11ee-a1ef-f123f15fe8a2 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [XEN PATCH v3 4/7] x86/hvm: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:32 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini --- xen/arch/x86/hvm/domain.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/domain.c b/xen/arch/x86/hvm/domain.c index 7f6e362a702e..b96cf93dd0ef 100644 --- a/xen/arch/x86/hvm/domain.c +++ b/xen/arch/x86/hvm/domain.c @@ -132,9 +132,9 @@ int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context *ctx) s = (struct segment_register) \ { 0, { (r)->s ## _ar }, (r)->s ## _limit, (r)->s ## _base }; \ /* Set accessed / busy bit for present segments. */ \ - if ( s.p ) \ - s.type |= (x86_seg_##s != x86_seg_tr ? 1 : 2); \ - check_segment(&s, x86_seg_ ## s); }) + if ( (s).p ) \ + (s).type |= (x86_seg_##s != x86_seg_tr ? 1 : 2); \ + check_segment(&(s), x86_seg_ ## s); }) rc = SEG(cs, regs); rc |= SEG(ds, regs); -- 2.34.1