* Re: cache line size (was Help booting MBX through bootd)
[not found] <376501C2.FAF2B207@switchboard.ericsson.se>
@ 1999-06-14 21:21 ` Wolfgang Denk
1999-06-15 0:00 ` Claude Robitaille
1 sibling, 0 replies; 2+ messages in thread
From: Wolfgang Denk @ 1999-06-14 21:21 UTC (permalink / raw
To: Magnus Damm; +Cc: linuxppc-dev
In message <376501C2.FAF2B207@switchboard.ericsson.se> you write:
>
> > But the cache line size differs even for different models of the 8xx
> > family!
>
> Are you sure?
Well, yes. But not exact enough. I silently included the 82x0 in the
8xx family.
> I browsed my 821, 823, 850 and 860 manuals and I found out that Motorola
> seem to have 2 different cpu cores.
>
> budget core: 850/823 - 8/8 TLBs, 2/1 Kbyte cache.
> standard core: 860/821 - 32/32 TLBs, 4/4 Kbyte cache.
> deluxe core: 860P - 32/32 TLBs, 16/8 Kbyte cache
>
> All seem to have 4 words a 32 bits in each cache line.
You are right.
> What about the other cpus; 60x, 750/740?
32 bytes per cache line = 8 32-bit words
> And the other embedded ones; 8240/8260?
>
> 8 words a 32 bits in each cache line?
Yes, the 82x0 have 8 32-bit words in each line.
Wolfgang Denk
--
Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd@denx.de
If you think the problem is bad now, just wait until we've solved it.
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* Re: cache line size (was Help booting MBX through bootd)
[not found] <376501C2.FAF2B207@switchboard.ericsson.se>
1999-06-14 21:21 ` cache line size (was Help booting MBX through bootd) Wolfgang Denk
@ 1999-06-15 0:00 ` Claude Robitaille
1 sibling, 0 replies; 2+ messages in thread
From: Claude Robitaille @ 1999-06-15 0:00 UTC (permalink / raw
Cc: linuxppc-dev@lists.linuxppc.org
On Mon, 14 Jun 1999, Magnus Damm wrote:
>
> budget core: 850/823 - 8/8 TLBs, 2/1 Kbyte cache.
> standard core: 860/821 - 32/32 TLBs, 4/4 Kbyte cache.
> deluxe core: 860P - 32/32 TLBs, 16/8 Kbyte cache
>
> All seem to have 4 words a 32 bits in each cache line.
>
> What about the other cpus; 60x, 750/740?
> And the other embedded ones; 8240/8260?
>
> 8 words a 32 bits in each cache line?
>
the 82x0 are based on the 603 and therefore have 32 bytes cache
lines.
BTW, there is a 603 variant that do not have floating
point capability, so the discussion about FP support will
also apply to it (and to the 8260, the 8240 has FP
support).
Claude
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[not found] <376501C2.FAF2B207@switchboard.ericsson.se>
1999-06-14 21:21 ` cache line size (was Help booting MBX through bootd) Wolfgang Denk
1999-06-15 0:00 ` Claude Robitaille
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