Potential bug of arm64 SMCCC call

From: "崇文 李" <chongwen.li@outlook.com>
To: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Potential bug of arm64 SMCCC call
Date: Mon, 25 Mar 2024 13:36:37 +0000	[thread overview]
Message-ID: <DS7PR19MB4407C29AC8FF38BA192DCDFFE6362@DS7PR19MB4407.namprd19.prod.outlook.com> (raw)

Hello. I saw a potential bug when I was checking arm64 SMCCC call.

In arm-smccc.h [see link 0], from line 481 to line 497 resides the
definition of "__arm_smccc_1_1", which is in turn used to implement
the RMI interface in rmi_cmds.h [see link 1].

In the definition of "__arm_smccc_1_1", there is no clobbering of
registers x4 -- x17.  However, according to Arm SMC Calling Convention
[see link 2, page 10 of 19], registers x4 -- x17 are scratch registers. 
Upon returning from an arm64 smc instruction, x4 -- x17 registers may 
be overwritten with mysterious values from the firmware.

So it is safer to mark x4--x17 registers as clobbered registers in the
"asm" statement inside the definition of "__arm_smccc_1_1", so the
compiler avoids using x4--x17 registers around arm64 smc instructions.

Best regards.

Links
============

[0] arm-smccc.h in arm's linux kernel repository
   https://gitlab.arm.com/linux-arm/linux-cca/-/blob/cca-host/rmm-v1.0-eac5/include/linux/arm-smccc.h?ref_type=heads

[1] rmi_cmds.h in arm's linux kernel repository
   https://gitlab.arm.com/linux-arm/linux-cca/-/blob/cca-host/rmm-v1.0-eac5/arch/arm64/include/asm/rmi_cmds.h?ref_type=heads

[2] Arm SMC Calling Convention
   https://documentation-service.arm.com/static/5f8ea482f86e16515cdbe3c6?token=
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