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Tue, 15 Jun 2021 07:34:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=rickchen36@gmail.com Received: by mail-il1-x134.google.com with SMTP id b14so14270508ilq.7 for ; Mon, 14 Jun 2021 22:34:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=zgBrhHnnIkxXJuehyeURC3VjlJXOOtbgHS81Z8ESzQc=; b=rfhKBFe9vNaxlr/2PInbnwZ0kjmVpVZ/KMH+05QSaN9H+TPKF1sootXBOiSA2Alvw3 KVEBm/8PrIWIDATYqDztiqD84bj8n7162NcxlME/l5YdJTA5UXYFWys22lTCPh+jd7kx mwn/EezTdPLPO09lQ1QHDlCwuHs8wtO1m+MfPsqF5kWhT90raHsJoIN3EmLjOXyEtWPb pbEiF5RRdSfmVQ+McM+KZDlonm+fo9J70TD05wCLLwCBc0FePPvYFTIjD08DZHe3KhSi AhEoaBSJxv3NlxcG9GB0N2LBnCrFqTyf228quOt78ftLwXwT5Wuz94wwCY4t67+Y+qpa Splw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=zgBrhHnnIkxXJuehyeURC3VjlJXOOtbgHS81Z8ESzQc=; b=MoV1JMEc13NKAgNZxEO7aM9oX2aiNX3Ov6JUmlQ9wwNeEPu86QTz5ge1o0V0je0jwi /OM1yL9bGLfATBRMcby5MgPXiQMcz6dmpoqERFvy8W/o7y5v6pbfZlYsYlQb1WE5vqbv OsQLNwarsvtulEYi0VczSXWjhMpH7my02ZQ913fBX5pECdbxOsl/rzCIqBnpKz8FMKXK FqSQS/vOPug8gs9ZmIYSx//AXnccf2nAm3k4ONN/ltRPM7gIERrPwWZqnbqZG1j6YnAl jTvxI4nRkEQn3wzk7Tz/wZXNaZc5d0feP3XB5rJ1APuw9Us+585ctcbxMpboZgRws4EA yx9A== X-Gm-Message-State: AOAM533Ywwvk25mmI29dTkZDW/KlKOfvMzddqFXMq/PZ6sgr3McrCW8d X5UrzPTxn9XRxPdkhvv8gBI0Qn/1P7o9StdclMs= X-Google-Smtp-Source: ABdhPJyperMyJ8btKNc/Ybdo7P0SyiGsStIZvpZfjrV4pyqP/GZCxh67D+k3NtnPu9OUps/mcsu9GzWAC1S3cH1DBL8= X-Received: by 2002:a92:c152:: with SMTP id b18mr16725429ilh.282.1623735240118; Mon, 14 Jun 2021 22:34:00 -0700 (PDT) MIME-Version: 1.0 References: <20210604055113.3630286-1-bmeng.cn@gmail.com> <20210604055113.3630286-4-bmeng.cn@gmail.com> <752D002CFF5D0F4FA35C0100F1D73F3FE5EA9B6E@ATCPCS12.andestech.com> In-Reply-To: <752D002CFF5D0F4FA35C0100F1D73F3FE5EA9B6E@ATCPCS12.andestech.com> From: Rick Chen Date: Tue, 15 Jun 2021 13:33:49 +0800 Message-ID: Subject: Re: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit To: Bin Meng Cc: U-Boot Mailing List , Leo Liang , rick Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean > From: Bin Meng > Sent: Friday, June 04, 2021 1:51 PM > To: Rick Jian-Zhi Chen(=E9=99=B3=E5=BB=BA=E5=BF=97) ;= Leo Yu-Chi Liang(=E6=A2=81=E8=82=B2=E9=BD=8A) ; U-B= oot Mailing List > Subject: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in= 32-bit > > All the device nodes that refer to plic0 as their interrupt parent have 2= cells encoded in their interrupts property, but plic0 only provides 1 cell= in #interrupt-cells which is incorrect. > > Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen