From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4CA463D; Thu, 11 Apr 2024 07:15:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712819756; cv=none; b=lRTPhAt1f6YJwPHO9NkC6mJEQhz00U/Ez91iTb338UAHD6q19PQxEIiKxxGfJRiAhhY1SFHsrqH1puu0M4haTpAGDaQXdqr0e41jMh4SwiMz4CMbbCpHFUgT0DCgSiWnRz/O9zcQk4J8l2V4kijVT+5dboU5HGfFBWd6k00OWQI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712819756; c=relaxed/simple; bh=EGxUFWIY3FhDr3OERYjKXmTSAvHQ47fM+usiXa4A2Co=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=MyKFHolpue8BiJhsh/AI/asY6Wwx8I5PgTK1gGlln6YE5vrGuB5FREzbs6x2nUI7BZQyPehayd8UlYTpJR0xMMlu8QZsY3tKZSg26007Tt2NKJdufkW5/CYc7+ijpTB/K+LWoTx3tbp2SRuFAY9fSrAeX3nKGvv6pUVgHkBOZpo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PoTjX5JU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PoTjX5JU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A3C20C433B2; Thu, 11 Apr 2024 07:15:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712819756; bh=EGxUFWIY3FhDr3OERYjKXmTSAvHQ47fM+usiXa4A2Co=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=PoTjX5JUmRzsaa0P9y56kJydskXtPGFPN262bWdaHgDQod2o3roC0PZCNerABsCwG bfYoknQIk2nufau511D9CeAz99/c+XBDYy9O7yS9Z1jFNFtUA7xvKQxJ/mBKdpOcAQ 8oBKA5LroCCkdcvSrmvcnHz8S4wEMgGzlbJBgQOBAwfoqFEvq51qHBY4tBRmieeKdp K1V/z2yZw+dZ7cxWukX9RlSxbg26oONq6miKxZS20ViA44IL5h1YPGHEH4QM1NDmps q4uBHpt3fB7RefgLPmbmEkh8QFaXUgnwKcsoM6Ruke9SxJbcWtDtjMPnbo5XIn7C6E 5gAsmHwkNvlMw== Received: by mail-lj1-f170.google.com with SMTP id 38308e7fff4ca-2d8a24f8a3cso35625111fa.1; Thu, 11 Apr 2024 00:15:56 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWrA+GcYGtmGo5jFBzRGVVqOYE67safUu/mkyLoBD2mX67rtbixn8vJrd2NrQDjrVP+dXRZnUudI/sZHZscMtUEBVfsuA+LMMyP0sl0+hOJd+KUdqmZZQRBsmxVoN0nNuRS6g3c5XX2ZA== X-Gm-Message-State: AOJu0YzTsuzoZEWAdmkBwpMjtZPAe7w9SMph0oy8/xL+TgzvXoZ1sXdl 80qsmm3CsrwZyc82OzlIzHDJffBKNOwPmhL54bKRVIDiXLIBv0LWC5lH2PlOEp4DLtgPjLZJV8l 4BuLj1q/iDCmhiuwv4yZ2dYZPyn0= X-Google-Smtp-Source: AGHT+IEIbzlNGUw7dH6rrBUAPRiam7orrjfOi6n1jf8KoAxJeALyXjve8wFV4wHUyAY7FtZhkFPztybk10CRfm7afS8= X-Received: by 2002:a05:651c:211e:b0:2d8:d8b5:73d4 with SMTP id a30-20020a05651c211e00b002d8d8b573d4mr2830394ljq.4.1712819754902; Thu, 11 Apr 2024 00:15:54 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> In-Reply-To: <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> From: Ard Biesheuvel Date: Thu, 11 Apr 2024 09:15:43 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT To: Samuel Holland , Arnd Bergmann Cc: Thiago Jung Bauermann , Andrew Morton , linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, Christoph Hellwig , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, Alex Deucher Content-Type: text/plain; charset="UTF-8" (cc Arnd) On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: > > Hi Thiago, > > On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: > > Samuel Holland writes: > >> On 2024-04-10 5:21 PM, Thiago Jung Bauermann wrote: > >>> > >>> Unfortunately this patch causes build failures on arm with allyesconfig > >>> and allmodconfig. Tested with next-20240410. > > > > > > > >> In both cases, the issue is that the toolchain requires runtime support to > >> convert between `unsigned long long` and `double`, even when hardware FP is > >> enabled. There was some past discussion about GCC inlining some of these > >> conversions[1], but that did not get implemented. > > > > Thank you for the explanation and the bugzilla reference. I added a > > comment there mentioning that the problem came up again with this patch > > series. > > > >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for > >> 32-bit arm until we can provide these runtime library functions. > > > > Does this mean that patch 2 in this series: > > > > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT > > > > will be dropped? > > No, because later patches in the series (3, 6) depend on the definition of > CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can > find a GPL-2 compatible implementation of the runtime library functions. > Is there really a point to doing that? Do 32-bit ARM systems even have enough address space to the map the BARs of the AMD GPUs that need this support? Given that this was not enabled before, I don't think the upshot of this series should be that we enable support for something on 32-bit ARM that may cause headaches down the road without any benefit. So I'd prefer a fixup patch that opts ARM out of this over adding support code for 64-bit conversions. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECE71CD1292 for ; Thu, 11 Apr 2024 07:16:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=b+u8evocfRQ0FvJI6GA5jLn+j9ze6I4ussw5zoea/VQ=; b=R5ekbIufNBWA+P CaCZsT2Yr1iXOz0Kv+XCIQ9iiow6cQSksBm+oWMjYUPT3ygXwUdFgk7K0Za90OnYA2bMcrIICKsLE IKpIhEwFXK7PYXnsgYwwqnJ05NYHkMCyh92Gvpt5UlKEkM2RByhYXRQzs01nPfx5xFBRAl1y5nILD /ruZvkqRjoaEmDitisPbCC2F3VM65m9KdSll317i9EUp63yT60hn+0oRLVahuOSXsI1OuM7Oy5KVc v70kEvOxjEf3gljmLjERiNOCx/nJkXsUgqMPzjRN1nJPkxaWJ2jqzPfOkgMioNdVs7L+fm6Qqx6Gs uB2T8lPdXfRBQQ67msUg==; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org (cc Arnd) On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: > > Hi Thiago, > > On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: > > Samuel Holland writes: > >> On 2024-04-10 5:21 PM, Thiago Jung Bauermann wrote: > >>> > >>> Unfortunately this patch causes build failures on arm with allyesconfig > >>> and allmodconfig. Tested with next-20240410. > > > > > > > >> In both cases, the issue is that the toolchain requires runtime support to > >> convert between `unsigned long long` and `double`, even when hardware FP is > >> enabled. There was some past discussion about GCC inlining some of these > >> conversions[1], but that did not get implemented. > > > > Thank you for the explanation and the bugzilla reference. I added a > > comment there mentioning that the problem came up again with this patch > > series. > > > >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for > >> 32-bit arm until we can provide these runtime library functions. > > > > Does this mean that patch 2 in this series: > > > > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT > > > > will be dropped? > > No, because later patches in the series (3, 6) depend on the definition of > CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can > find a GPL-2 compatible implementation of the runtime library functions. > Is there really a point to doing that? Do 32-bit ARM systems even have enough address space to the map the BARs of the AMD GPUs that need this support? Given that this was not enabled before, I don't think the upshot of this series should be that we enable support for something on 32-bit ARM that may cause headaches down the road without any benefit. So I'd prefer a fixup patch that opts ARM out of this over adding support code for 64-bit conversions. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35873CD128A for ; Thu, 11 Apr 2024 07:16:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 11 Apr 2024 00:15:54 -0700 (PDT) MIME-Version: 1.0 References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> In-Reply-To: <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> From: Ard Biesheuvel Date: Thu, 11 Apr 2024 09:15:43 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT To: Samuel Holland , Arnd Bergmann Cc: Thiago Jung Bauermann , Andrew Morton , linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, Christoph Hellwig , loongarch@lists.linux.dev, amd-gfx@lists.freedesktop.org, Alex Deucher X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_001558_214481_7C78F736 X-CRM114-Status: GOOD ( 24.22 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org (cc Arnd) On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: > > Hi Thiago, > > On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: > > Samuel Holland writes: > >> On 2024-04-10 5:21 PM, Thiago Jung Bauermann wrote: > >>> > >>> Unfortunately this patch causes build failures on arm with allyesconfig > >>> and allmodconfig. Tested with next-20240410. > > > > > > > >> In both cases, the issue is that the toolchain requires runtime support to > >> convert between `unsigned long long` and `double`, even when hardware FP is > >> enabled. There was some past discussion about GCC inlining some of these > >> conversions[1], but that did not get implemented. > > > > Thank you for the explanation and the bugzilla reference. I added a > > comment there mentioning that the problem came up again with this patch > > series. > > > >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for > >> 32-bit arm until we can provide these runtime library functions. > > > > Does this mean that patch 2 in this series: > > > > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT > > > > will be dropped? > > No, because later patches in the series (3, 6) depend on the definition of > CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can > find a GPL-2 compatible implementation of the runtime library functions. > Is there really a point to doing that? Do 32-bit ARM systems even have enough address space to the map the BARs of the AMD GPUs that need this support? Given that this was not enabled before, I don't think the upshot of this series should be that we enable support for something on 32-bit ARM that may cause headaches down the road without any benefit. So I'd prefer a fixup patch that opts ARM out of this over adding support code for 64-bit conversions. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62211CD128A for ; Thu, 11 Apr 2024 07:17:00 +0000 (UTC) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=PoTjX5JU; dkim-atps=neutral Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4VFWGg0GcVz3dX6 for ; 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Thu, 11 Apr 2024 00:15:54 -0700 (PDT) MIME-Version: 1.0 References: <20240329072441.591471-1-samuel.holland@sifive.com> <20240329072441.591471-14-samuel.holland@sifive.com> <87wmp4oo3y.fsf@linaro.org> <75a37a4b-f516-40a3-b6b5-4aa1636f9b60@sifive.com> <87wmp4ogoe.fsf@linaro.org> <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> In-Reply-To: <4c8e63d6-ba33-47fe-8150-59eba8babf2d@sifive.com> From: Ard Biesheuvel Date: Thu, 11 Apr 2024 09:15:43 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT To: Samuel Holland , Arnd Bergmann Content-Type: text/plain; charset="UTF-8" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Thiago Jung Bauermann , x86@kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, Christoph Hellwig , loongarch@lists.linux.dev, Alex Deucher , Andrew Morton , linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" (cc Arnd) On Thu, 11 Apr 2024 at 03:11, Samuel Holland wrote: > > Hi Thiago, > > On 2024-04-10 8:02 PM, Thiago Jung Bauermann wrote: > > Samuel Holland writes: > >> On 2024-04-10 5:21 PM, Thiago Jung Bauermann wrote: > >>> > >>> Unfortunately this patch causes build failures on arm with allyesconfig > >>> and allmodconfig. Tested with next-20240410. > > > > > > > >> In both cases, the issue is that the toolchain requires runtime support to > >> convert between `unsigned long long` and `double`, even when hardware FP is > >> enabled. There was some past discussion about GCC inlining some of these > >> conversions[1], but that did not get implemented. > > > > Thank you for the explanation and the bugzilla reference. I added a > > comment there mentioning that the problem came up again with this patch > > series. > > > >> The short-term fix would be to drop the `select ARCH_HAS_KERNEL_FPU_SUPPORT` for > >> 32-bit arm until we can provide these runtime library functions. > > > > Does this mean that patch 2 in this series: > > > > [PATCH v4 02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT > > > > will be dropped? > > No, because later patches in the series (3, 6) depend on the definition of > CC_FLAGS_FPU from that patch. I will need to send a fixup patch unless I can > find a GPL-2 compatible implementation of the runtime library functions. > Is there really a point to doing that? Do 32-bit ARM systems even have enough address space to the map the BARs of the AMD GPUs that need this support? Given that this was not enabled before, I don't think the upshot of this series should be that we enable support for something on 32-bit ARM that may cause headaches down the road without any benefit. So I'd prefer a fixup patch that opts ARM out of this over adding support code for 64-bit conversions.