From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76289C48BCF for ; Sat, 12 Jun 2021 21:31:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5BA6A61029 for ; Sat, 12 Jun 2021 21:31:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231532AbhFLVdJ (ORCPT ); Sat, 12 Jun 2021 17:33:09 -0400 Received: from mail-pj1-f42.google.com ([209.85.216.42]:50885 "EHLO mail-pj1-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229753AbhFLVdG (ORCPT ); Sat, 12 Jun 2021 17:33:06 -0400 Received: by mail-pj1-f42.google.com with SMTP id g4so7616619pjk.0; Sat, 12 Jun 2021 14:31:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=UT0PdgheKss+feL5W1tJk656NZS8mRVgpOEkeRZAARw=; b=FyoOLLSv8iEB+7G5J7YUN5Tk6sr2uWv/LSaJvccAiZ50QzuJWlRgLlEDPzxX8LmNBH W19YUJaV9frRvtrcaeKatL4vCS2ZkQcgCjVnLxZs2BIpTCES4mQ0iTyRw+BxS/lEH0F1 TnluSkRLzj0ZSqSAyEK2ixLWi15w96/+EWDsGV3fsRLp8FOGOI5aw0O5UrYmOrF8ekJ8 76VYmFElEPO833nWnCBwIH43UiFqxXISDPDxgngZxZaCraHhjG33T5kBSasdT8JJ/mMt xBs44Us/tIInz6Ujwtm1qjr8tKyLcgiLwzG1/+Vhfhn593n6uCdTM9dbo2ImfA/xYG7N xzRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=UT0PdgheKss+feL5W1tJk656NZS8mRVgpOEkeRZAARw=; b=k5mduIgaz47IK++M4bmy9ebxzcC3TM2LfxOipVs1TvlDqBQ2EQMBvBRlZWzP8e8sGi AUOyPwHCKhbN4W51UAu+Cwip5Oljm9bFQOaQwYIkVWKjBdH7SjUu551sFXE9MlB0ztY+ 2xjbgU0RTHdzXHUcZBr2uzzGPeRYCLQsgUz9GbQAOp6RwJbckQoEjOXfXpuHi1XmUsD5 gNHJbRT8m8xc3WYH09KAY/E95AGCq78YwG8iKDibS51hZVDY7PKIUgJZib/F3/Ab9RlH LTb7SygvxDXUjtCS6NcjA5VOJWJlorl/mPZxc+ki8aCxIIFo14tiZi6JJqqAtG2oDLIK wlWA== X-Gm-Message-State: AOAM533Z+cJ/H9+0/+wVgwGpwW7gMFn1PSWxeT3Dw5Guo9Ti7dciaM1Y TzqC+h6yQYuPKclBbG63iSfbc/kX3GozT9Y2zDA= X-Google-Smtp-Source: ABdhPJwcx7zR0MqeWhCvGkg37I1rpObfhF4zJU97thMpHq8Kl34o79PE1ItzkjWrPKLNd1ob8IzhC4vs7nZ7VeNoqvs= X-Received: by 2002:a17:90b:818:: with SMTP id bk24mr11172538pjb.228.1623533406106; Sat, 12 Jun 2021 14:30:06 -0700 (PDT) MIME-Version: 1.0 References: <5d8e5e8a29ecf39da48beb94c42003a5c686ec4e.1623532208.git.sander@svanheule.net> In-Reply-To: <5d8e5e8a29ecf39da48beb94c42003a5c686ec4e.1623532208.git.sander@svanheule.net> From: Andy Shevchenko Date: Sun, 13 Jun 2021 00:29:49 +0300 Message-ID: Subject: Re: [PATCH v5 2/8] gpio: regmap: Add quirk for aliased data registers To: Sander Vanheule Cc: Pavel Machek , Rob Herring , Lee Jones , Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Michael Walle , Linus Walleij , Bartosz Golaszewski , Linux LED Subsystem , devicetree , "open list:GPIO SUBSYSTEM" , Andrew Lunn , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jun 13, 2021 at 12:13 AM Sander Vanheule wrote: > > Some chips have the read-only input and write-only output data registers > aliased to the same offset. As a result it is not possible to perform > read-modify-writes on the output values, when a line is still configured > as input. > > Add a quirk for aliased data registers, and document how the regmap > should be set up for correct operation. I still believe that there is no issue with gpio-regmap and we don't need any quirk there. The issue is in the regmap APIs (implementation) itself. Hardware with the concept of reading X / writing Y at the same offset is okay per se. regmaps doesn't support it properly and should be fixed (amended) in a way that you provide this kind of register description thru regmap configuration or so. I expressed the idea of trying to implement regmap-8250 as an example of the support for such hardware. And OTOH that this kind of hardware is not unusual. -- With Best Regards, Andy Shevchenko