* [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC
@ 2023-06-19 17:09 Marcin Juszkiewicz
2023-06-19 17:09 ` [PATCH v2 1/1] hw/arm/sbsa-ref: add ITS support in SBSA GIC Marcin Juszkiewicz
2023-06-23 10:30 ` [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Peter Maydell
0 siblings, 2 replies; 3+ messages in thread
From: Marcin Juszkiewicz @ 2023-06-19 17:09 UTC (permalink / raw
To: qemu-devel
Cc: qemu-arm, Peter Maydell, Shashi Mallela, Leif Lindholm,
Radoslaw Biernacki, Marcin Juszkiewicz
In 2021 Shashi Mallela sent v8 of GIC ITS patchset [1]. At that time it
was decided to do platform versioning first.
1. https://lore.kernel.org/qemu-devel/20210812165341.40784-8-shashi.mallela@linaro.org/
Now we are going through our list of changes for SBSA Reference Platform
and GIC ITS is one of early ones. There was decision that there will be
no option to disable it and platform version will get a minor bump.
This is refreshed version of v8 one from 2021. GIC ITS is placed behind
GIC Redistributor in memory space to allow use of older EDK2 firmware.
New address is placed in DeviceTree for firmware to use. Due to it we
also bump platform version to 0.2 version.
Trusted Firmware will read GIC ITS address and provide to EDK2 via
Secure Monitor Call (SMC). Same way as it is done with GIC addresses
already.
Changes since v1:
- everything in one patch
- removed bogus check for kvm_irqchip_in_kernel()
- documentation about platform version changes added
Shashi Mallela (1):
hw/arm/sbsa-ref: add ITS support in SBSA GIC
docs/system/arm/sbsa.rst | 14 ++++++++++++++
hw/arm/sbsa-ref.c | 33 ++++++++++++++++++++++++++++++---
2 files changed, 44 insertions(+), 3 deletions(-)
--
2.40.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v2 1/1] hw/arm/sbsa-ref: add ITS support in SBSA GIC
2023-06-19 17:09 [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Marcin Juszkiewicz
@ 2023-06-19 17:09 ` Marcin Juszkiewicz
2023-06-23 10:30 ` [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Peter Maydell
1 sibling, 0 replies; 3+ messages in thread
From: Marcin Juszkiewicz @ 2023-06-19 17:09 UTC (permalink / raw
To: qemu-devel
Cc: qemu-arm, Peter Maydell, Shashi Mallela, Leif Lindholm,
Radoslaw Biernacki, Marcin Juszkiewicz
From: Shashi Mallela <shashi.mallela@linaro.org>
Create ITS as part of SBSA platform GIC initialization.
GIC ITS information is in DeviceTree so TF-A can pass it to EDK2.
Bumping platform version to 0.2 as this is important hardware change.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Co-authored-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
docs/system/arm/sbsa.rst | 14 ++++++++++++++
hw/arm/sbsa-ref.c | 33 ++++++++++++++++++++++++++++++---
2 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
index f571fe645e..a8e0b530a2 100644
--- a/docs/system/arm/sbsa.rst
+++ b/docs/system/arm/sbsa.rst
@@ -46,6 +46,9 @@ to be a complete compliant DT. It currently reports:
- platform version
- GIC addresses
+Platform version
+''''''''''''''''
+
The platform version is only for informing platform firmware about
what kind of ``sbsa-ref`` board it is running on. It is neither
a QEMU versioned machine type nor a reflection of the level of the
@@ -54,3 +57,14 @@ SBSA/SystemReady SR support provided.
The ``machine-version-major`` value is updated when changes breaking
fw compatibility are introduced. The ``machine-version-minor`` value
is updated when features are added that don't break fw compatibility.
+
+Platform version changes:
+
+0.0
+ Devicetree holds information about CPUs, memory and platform version.
+
+0.1
+ GIC information is present in devicetree.
+
+0.2
+ GIC ITS information is present in devicetree.
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index de21200ff9..0639f97dd5 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -65,6 +65,7 @@ enum {
SBSA_CPUPERIPHS,
SBSA_GIC_DIST,
SBSA_GIC_REDIST,
+ SBSA_GIC_ITS,
SBSA_SECURE_EC,
SBSA_GWDT_WS0,
SBSA_GWDT_REFRESH,
@@ -108,6 +109,7 @@ static const MemMapEntry sbsa_ref_memmap[] = {
[SBSA_CPUPERIPHS] = { 0x40000000, 0x00040000 },
[SBSA_GIC_DIST] = { 0x40060000, 0x00010000 },
[SBSA_GIC_REDIST] = { 0x40080000, 0x04000000 },
+ [SBSA_GIC_ITS] = { 0x44081000, 0x00020000 },
[SBSA_SECURE_EC] = { 0x50000000, 0x00001000 },
[SBSA_GWDT_REFRESH] = { 0x50010000, 0x00001000 },
[SBSA_GWDT_CONTROL] = { 0x50011000, 0x00001000 },
@@ -181,8 +183,15 @@ static void sbsa_fdt_add_gic_node(SBSAMachineState *sms)
2, sbsa_ref_memmap[SBSA_GIC_REDIST].base,
2, sbsa_ref_memmap[SBSA_GIC_REDIST].size);
+ nodename = g_strdup_printf("/intc/its");
+ qemu_fdt_add_subnode(sms->fdt, nodename);
+ qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg",
+ 2, sbsa_ref_memmap[SBSA_GIC_ITS].base,
+ 2, sbsa_ref_memmap[SBSA_GIC_ITS].size);
+
g_free(nodename);
}
+
/*
* Firmware on this machine only uses ACPI table to load OS, these limited
* device tree nodes are just to let firmware know the info which varies from
@@ -219,7 +228,7 @@ static void create_fdt(SBSAMachineState *sms)
* fw compatibility.
*/
qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0);
- qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 1);
+ qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 2);
if (ms->numa_state->have_numa_distance) {
int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t);
@@ -409,7 +418,20 @@ static void create_secure_ram(SBSAMachineState *sms,
memory_region_add_subregion(secure_sysmem, base, secram);
}
-static void create_gic(SBSAMachineState *sms)
+static void create_its(SBSAMachineState *sms)
+{
+ const char *itsclass = its_class_name();
+ DeviceState *dev;
+
+ dev = qdev_new(itsclass);
+
+ object_property_set_link(OBJECT(dev), "parent-gicv3", OBJECT(sms->gic),
+ &error_abort);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, sbsa_ref_memmap[SBSA_GIC_ITS].base);
+}
+
+static void create_gic(SBSAMachineState *sms, MemoryRegion *mem)
{
unsigned int smp_cpus = MACHINE(sms)->smp.cpus;
SysBusDevice *gicbusdev;
@@ -436,6 +458,10 @@ static void create_gic(SBSAMachineState *sms)
qdev_prop_set_uint32(sms->gic, "len-redist-region-count", 1);
qdev_prop_set_uint32(sms->gic, "redist-region-count[0]", redist0_count);
+ object_property_set_link(OBJECT(sms->gic), "sysmem",
+ OBJECT(mem), &error_fatal);
+ qdev_prop_set_bit(sms->gic, "has-lpi", true);
+
gicbusdev = SYS_BUS_DEVICE(sms->gic);
sysbus_realize_and_unref(gicbusdev, &error_fatal);
sysbus_mmio_map(gicbusdev, 0, sbsa_ref_memmap[SBSA_GIC_DIST].base);
@@ -482,6 +508,7 @@ static void create_gic(SBSAMachineState *sms)
sysbus_connect_irq(gicbusdev, i + 3 * smp_cpus,
qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
}
+ create_its(sms);
}
static void create_uart(const SBSAMachineState *sms, int uart,
@@ -788,7 +815,7 @@ static void sbsa_ref_init(MachineState *machine)
create_secure_ram(sms, secure_sysmem);
- create_gic(sms);
+ create_gic(sms, sysmem);
create_uart(sms, SBSA_UART, sysmem, serial_hd(0));
create_uart(sms, SBSA_SECURE_UART, secure_sysmem, serial_hd(1));
--
2.40.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC
2023-06-19 17:09 [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Marcin Juszkiewicz
2023-06-19 17:09 ` [PATCH v2 1/1] hw/arm/sbsa-ref: add ITS support in SBSA GIC Marcin Juszkiewicz
@ 2023-06-23 10:30 ` Peter Maydell
1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2023-06-23 10:30 UTC (permalink / raw
To: Marcin Juszkiewicz
Cc: qemu-devel, qemu-arm, Shashi Mallela, Leif Lindholm,
Radoslaw Biernacki
On Mon, 19 Jun 2023 at 18:09, Marcin Juszkiewicz
<marcin.juszkiewicz@linaro.org> wrote:
>
> In 2021 Shashi Mallela sent v8 of GIC ITS patchset [1]. At that time it
> was decided to do platform versioning first.
>
> 1. https://lore.kernel.org/qemu-devel/20210812165341.40784-8-shashi.mallela@linaro.org/
>
> Now we are going through our list of changes for SBSA Reference Platform
> and GIC ITS is one of early ones. There was decision that there will be
> no option to disable it and platform version will get a minor bump.
>
> This is refreshed version of v8 one from 2021. GIC ITS is placed behind
> GIC Redistributor in memory space to allow use of older EDK2 firmware.
>
> New address is placed in DeviceTree for firmware to use. Due to it we
> also bump platform version to 0.2 version.
>
> Trusted Firmware will read GIC ITS address and provide to EDK2 via
> Secure Monitor Call (SMC). Same way as it is done with GIC addresses
> already.
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-06-19 17:09 [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Marcin Juszkiewicz
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2023-06-23 10:30 ` [PATCH v2 0/1] hw/arm/sbsa-ref: add ITS support in GIC Peter Maydell
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